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MPQ4480 Datasheet(PDF) 16 Page - MPS Industries, Inc. |
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MPQ4480 Datasheet(HTML) 16 Page - MPS Industries, Inc. |
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16 / 22 page ![]() MPQ4480 – 36V, 6A, SYNC STEP-DOWN CONVERTER FOR AEC1-Q100 QUALIFIED MPQ4480 Rev. 1.0 www.MonolithicPower.com 16 7/2/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. falls below 105% of VREF. During OV protection, if the input voltage reaches 40V, the MPQ4480 stops the OVP discharge function until VIN drops to 38V. RGND Short to Battery Protection The MPQ4480 supports USB_GND short to battery protection. The USB_GND should be connected to the RGND through an N-MOSFET. The MPQ4480 senses the current from RGND to PGND, and the GATE pin is pulled low to turn off the N-MOSFET when the RGND-to- PGND current is above 12A. If RGND shorts to battery, the buck stops switching. When the battery short to ground is removed, the MPQ4480 resumes normal operation. Output Line Drop Compensation The MPQ4480 is capable of compensating an output voltage drop, such as high impedance caused by a long trace, to keep a fairly constant load-side voltage. The MPQ4480 uses the sensed load current through the internal ground current sensing MOSFET to sink a current (IFB) at the FB pin (see Figure 5). - + VREF R1 V+ GND R2 CO L Gate Drive Error Amp SW RGND FB VIN PGND IRTN IFB G VDROP RSENSE Figure 5: Output Line Drop Compensation Circuit Calculate the feedback current with Equation (2): FB RTN IG I (2) VO can be calculated with Equation (3): 1 OUT REF 1 RTN 2 R V1 v R G I R (3) The line drop compensation amplitude at certain output current condition is equal to R1 * G * IOUT. The VDROP pin can program three gain levels, as the specification table shows. The R1 value can also be used to adjust the line drop compensation amplitude. For example, at 3A output current, pull VDROP = 0 and select 40.2kΩ for R1 for the line drop compensation to be ~73mV (typically). Floating Driver and Bootstrap Charging An external bootstrap capacitor powers the floating power MOSFET driver. This floating driver has its own UVLO protection. The UVLO’s rising threshold is 2.2V, with a hysteresis of 150mV. The bootstrap capacitor voltage is regulated internally by VIN and VCC through D1, D2, M1, C4, L1, and C2 (see Figure 6). The BST capacitor (C4) voltage is charged quickly by turning on M1 when the low- side switch is turned on. The 2.5μA input to the BST current source also charges the BST capacitor when the low-side switch does not turn on. VIN VCC SW VOUT Turn on PMOS when LS is on L1 C2 M1 D1 2.5µA D2 C4 BST Figure 6: Internal Bootstrap Charging Circuit Start-Up and Shutdown If both VIN and EN exceed their respective thresholds, the chip is enabled. The reference block starts first, generating a stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides a stable supply for the remaining circuitries. Several events can shut down the chip: EN low, VIN low, and thermal shutdown. In shutdown, the signaling path is blocked to avoid any fault triggering. Then the COMP voltage and the internal supply rail are pulled down. The floating driver is not subject to this shutdown command. Thermal Shutdown (TSD) Thermal shutdown prevents the chip from operating at exceedingly high temperatures. |
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