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UC1682THCZ Datasheet(PDF) 49 Page - List of Unclassifed Manufacturers

Part # UC1682THCZ
Description  HIGH-VOLTAGE MIXED-SIGNAL IC
PDF  70 Pages
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Manufacturer  ETC2 [List of Unclassifed Manufacturers]
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UC1682THCZ Datasheet(HTML) 49 Page - List of Unclassifed Manufacturers

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UC1682
80x104RGB CSTN Controller-Driver
Revision 0.6
47
SAMPLE POWER MANAGEMENT COMMAND SEQUENCES
The following tables are examples of command sequence for power-up, power-down and display ON/OFF
operations. These are only to demonstrate some “
typical, generic” scenarios. Designers are encouraged to
study related sections of the datasheet and find out what the best parameters and control sequences are for
their specific design needs.
C/D
The type of the interface cycle. It can be either Command (0) or Data (1)
W/R
The direction of dataflow of the cycle. It can be either Write (0) or Read (1).
Type
Required: These items are required
Customer: These items are not necessary if customer parameters are the same as default
Advanced: We recommend new users to skip these commands and use default values.
Optional:
These commands depend on what users want to do.
POWER-UP
Type C/D W/R D7 D6 D5 D4 D3 D2 D1 D0
Chip action
Comments
R
–
–
–
–
–
–
–
–
–
– Automatic Power-ON Reset.
Wait 5~10ms after VDD is ON
R
0
0
0
0
1
0
0
0
1
0
1
0
1
0
0
0
0
0
0
0
(37) Set OTP operation
Control.
(Double-type Command)
Ignore OTP value
C
0
0
0
0
1
0
0
1
#
# (5) Set Temp. Compensation
C
0
0
1
1
0
0
0
#
#
# (20) Set LCD Mapping
Set up LCD format specific
parameters, MX, MY, etc.
A
0
0
1
0
1
0
0
0
#
# (15) Set Line Rate
C
0
0
1
1
0
1
0
1
#
# (22) Set Color Mode
Fine tune for power, flicker,
contrast, and shading.
C
0
0
1
1
1
0
1
0
#
# (26) Set LCD Bias Ratio
R
0
0
0
0
1
#
0
#
0
#
0
#
0
#
0
#
0
#
1
#
(11) Set VBIAS Potentiometer
LCD specific operating
voltage setting
O
1
.
.
1
0
.
.
0
#
.
.
#
#
.
.
#
#
.
.
#
#
.
.
#
#
.
.
#
#
.
.
#
#
.
.
#
#
.
.
#
Write display RAM
Set up display image
R
0
0
1
0
1
0
1
1
1
1 (18) Set Display Enable
POWER-DOWN
Type C/D W/R D7 D6 D5 D4 D3 D2 D1 D0
Chip action
Comments
R
0
0
1
1
1
0
0
0
1
0 (23) System Reset
R
–
–
–
–
–
–
–
–
–
– Draining capacitor
Wait ~1ms before VDD OFF
BRIEF DISPLAY-OFF
Type C/D W/R D7 D6 D5 D4 D3 D2 D1 D0
Chip action
Comments
R
0
0
1
0
1
0
1
1
1
0 (18) Set Display Disable
C
1
.
.
1
0
.
.
0
#
.
.
#
#
.
.
#
#
.
.
#
#
.
.
#
#
.
.
#
#
.
.
#
#
.
.
#
#
.
.
#
Write display RAM
Set up display image (Image
update is optional. Data in
the RAM is retained through
the SLEEP state.)
R
0
0
1
0
1
0
1
1
1
1 (18) Set Display Enable
* This is only recommended for very brief display OFF (under 10mS).
If image becomes unstable use the
Extended Display OFF approach shown below.



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