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ATMEGA48 Datasheet(PDF) 157 Page - ATMEL Corporation |
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ATMEGA48 Datasheet(HTML) 157 Page - ATMEL Corporation |
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157 / 374 page  157 2545J–AVR–12/06 ATmega48/88/168 A FOC2B strobe will not generate any interrupt, nor will it clear the timer in CTC mode using OCR2B as TOP. The FOC2B bit is always read as zero. • Bits 5:4 – Res: Reserved Bits These bits are reserved bits in the ATmega48/88/168 and will always read as zero. • Bit 3 – WGM22: Waveform Generation Mode See the description in the ”TCCR2A – Timer/Counter Control Register A” on page 153. • Bit 2:0 – CS22:0: Clock Select The three Clock Select bits select the clock source to be used by the Timer/Counter, see Table 16-9. If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the counter even if the pin is configured as an output. This feature allows software control of the counting. 16.11.3 TCNT2 – Timer/Counter Register The Timer/Counter Register gives direct access, both for read and write operations, to the Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes) the Compare Match on the following timer clock. Modifying the counter (TCNT2) while the counter is running, introduces a risk of missing a Compare Match between TCNT2 and the OCR2x Registers. 16.11.4 OCR2A – Output Compare Register A Table 16-9. Clock Select Bit Description CS22 CS21 CS20 Description 0 0 0 No clock source (Timer/Counter stopped). 001 clkT2S/(No prescaling) 010 clkT2S/8 (From prescaler) 011 clkT2S/32 (From prescaler) 100 clkT2S/64 (From prescaler) 101 clkT2S/128 (From prescaler) 110 clkT2S/256 (From prescaler) 111 clk T 2S/1024 (From prescaler) Bit 7 65 43 21 0 (0xB2) TCNT2[7:0] TCNT2 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 654 32 10 (0xB3) OCR2A[7:0] OCR2A Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 |
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