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ATMEGA649 Datasheet(PDF) 79 Page - ATMEL Corporation |
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ATMEGA649 Datasheet(HTML) 79 Page - ATMEL Corporation |
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79 / 375 page ![]() 79 ATmega329/3210/649/6410 2552H–AVR–11/06 Alternate Functions of Port G The alternate pin configuration is as follows: Note: 1. Port G, PG5 is input only. Pull-up is always on. See Table 125 on page 282 for RSTDISBL fuse. The alternate pin configuration is as follows: • RESET – Port G, Bit 5 RESET: External Reset input. When the RSTDISBL Fuse is programmed (‘0’), PG5 will function as input with pull-up always on. • T0/SEG – Port G, Bit 4 T0, Timer/Counter0 Counter Source. SEG, LCD front plane 32/23. • T1/SEG24 – Port G, Bit 3 T1, Timer/Counter1 Counter Source. SEG, LCD front plane 33/24. • SEG – Port G, Bit 2 SEG, LCD front plane 4/4. Table 44. Overriding Signals for Alternate Functions in PF3:PF0 Signal Name PF3/ADC3 PF2/ADC2 PF1/ADC1 PF0/ADC0 PUOE 000 0 PUOV 000 0 DDOE 0 0 0 0 DDOV 0 0 0 0 PVOE 000 0 PVOV 000 0 PTOE ––– – DIEOE 000 0 DIEOV 000 0 DI ––– – AIO ADC3 INPUT ADC2 INPUT ADC1 INPUT ADC0 INPUT Table 45. Port G Pins Alternate Functions (SEG refers to 100-pin/64-pin pinout) Port Pin Alternate Function PG5 RESET(1) PG4 T0/SEG (Timer/Counter0 Clock Input or LCD Front Plane 32/23) PG3 T1/SEG (Timer/Counter1 Clock Input or LCD Front Plane 33/24) PG2 SEG (LCD Front Plane 4/4) PG1 SEG (LCD Front Plane 17/13) PG0 SEG (LCD Front Plane 18/14) |
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