EFM32GG11 datasheet(57/261 Pages) SILABS

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4.1.16 Digital to Analog Converter (VDAC)

DRIVESTRENGTH = 2 unless otherwise specified. Primary VDAC output.

Table 4.24. Digital to Analog Converter (VDAC)

Parameter

Symbol

Test Condition

Min

Typ

Max

Unit

Output voltage

VDACOUT

Single-Ended

—

VVREF

Differential2

-VVREF

—

VVREF

Current consumption includ-

ing references (2 channels)1

IDAC

500 ksps, 12-bit, DRIVES-

TRENGTH = 2, REFSEL = 4

—

402

—

µA

44.1 ksps, 12-bit, DRIVES-

TRENGTH = 1, REFSEL = 4

—

µA

200 Hz refresh rate, 12-bit Sam-

ple-Off mode in EM2, DRIVES-

TRENGTH = 2, BGRREQTIME =

1, EM2REFENTIME = 9, REFSEL

= 4, SETTLETIME = 0x0A, WAR-

MUPTIME = 0x02

—

µA

Current from HFPERCLK4

IDAC_CLK

—

5.25

—

µA/MHz

Sample rate

SRDAC

—

500

ksps

DAC clock frequency

fDAC

—

MHz

Conversion time

tDACCONV

fDAC = 1MHz

—

µs

Settling time

tDACSETTLE

50% fs step settling to 5 LSB

—

2.5

—

µs

Startup time

tDACSTARTUP

Enable to 90% fs output, settling

to 10 LSB

—

µs

Output impedance

ROUT

DRIVESTRENGTH = 2, 0.4 V ≤

VOUT ≤ VOPA - 0.4 V, -8 mA <

IOUT < 8 mA, Full supply range

—

Ω

DRIVESTRENGTH = 0 or 1, 0.4 V

≤ VOUT ≤ VOPA - 0.4 V, -400 µA <

IOUT < 400 µA, Full supply range

—

Ω

DRIVESTRENGTH = 2, 0.1 V ≤

VOUT ≤ VOPA - 0.1 V, -2 mA <

IOUT < 2 mA, Full supply range

—

Ω

DRIVESTRENGTH = 0 or 1, 0.1 V

≤ VOUT ≤ VOPA - 0.1 V, -100 µA <

IOUT < 100 µA, Full supply range

—

Ω

Power supply rejection ratio6 PSRR

Vout = 50% fs. DC

—

65.5

—

EFM32GG11 Family Data Sheet

Electrical Specifications

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