| Electronic Components Datasheet Search |
|
EFM32GG11 Datasheet(PDF) 67 Page - Silicon Laboratories |
|
|
|||||||||||||||||||||||||||||
EFM32GG11 Datasheet(HTML) 67 Page - Silicon Laboratories |
|
67 / 261 page ![]() Parameter Symbol Test Condition Min Typ Max Unit Note: 1. Specified configuration for 3X-Gain configuration is: INCBW = 1, HCMDIS = 1, RESINSEL = VSS, VINPUT = 0.5 V, VOUTPUT = 1.5 V. Nominal voltage gain is 3. 2. If the maximum CLOAD is exceeded, an isolation resistor is required for stability. See AN0038 for more information. 3. When INCBW is set to 1 the OPAMP bandwidth is increased. This is allowed only when the non-inverting close-loop gain is ≥ 3, or the OPAMP may not be stable. 4. Current into the load resistor is excluded. When the OPAMP is connected with closed-loop gain > 1, there will be extra current to drive the resistor feedback network. The internal resistor feedback network has total resistance of 143.5 kOhm, which will cause another ~10 µA current when the OPAMP drives 1.5 V between output and ground. 5. Step between 0.2V and VOPA-0.2V, 10%-90% rising/falling range. 6. From enable to output settled. In sample-and-off mode, RC network after OPAMP will contribute extra delay. Settling error < 1mV. 7. In unit gain connection, UGF is the gain-bandwidth product of the OPAMP. In 3x Gain connection, UGF is the gain-bandwidth product of the OPAMP and 1/3 attenuation of the feedback network. 8. Specified configuration for Unit gain buffer configuration is: INCBW = 0, HCMDIS = 0, RESINSEL = DISABLE. VINPUT = 0.5 V, VOUTPUT = 0.5 V. 9. When HCMDIS=1 and input common mode transitions the region from VOPA-1.4V to VOPA-1V, input offset will change. PSRR and CMRR specifications do not apply to this transition region. 4.1.20 LCD Driver Table 4.28. LCD Driver Parameter Symbol Test Condition Min Typ Max Unit Frame rate fLCDFR 30 — 100 Hz LCD supply range2 VLCDIN 1.8 — 3.8 V LCD output voltage range VLCD Current source mode, No external LCD capacitor 2.0 — VLCDIN-0.4 V Step-down mode with external LCD capacitor 2.0 — VLCDIN V Charge pump mode with external LCD capacitor 2.0 — 1.9 * VLCDIN V Contrast control step size STEPCONTRAST Current source mode — 64 — mV Charge pump or Step-down mode — 43 — mV Contrast control step accura- cy1 ACCCONTRAST — +/-4 — % Note: 1. Step size accuracy is measured relative to the typical step size, and typ value represents one standard deviation. 2. VLCDIN is selectable between the AVDD or DVDD supply pins, depending on EMU_PWRCTRL_ANASW. EFM32GG11 Family Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.2 | 67 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |