AD8460 datasheet(32/75 Pages) AD

32 / 75 page

Data Sheet

AD8460

analog.com

Rev.0

32 of 75

ANALOG PATTERN GENERATION (APG)

To enable the APG mode, set the APG_MODE_ENABLE bit to (1) in the CTRL_REG_02 register and then set

WAVE_GEN_MODE bit to (1) in the CTRL_REG_00 register.

The pattern is generated in non-real time and data is loaded serially through SPI into pattern memory prior to

updating the driver output. The SYNC signal loads the DAC input on its rising edge based on the values in the

pattern memory in the HVDAC_DATA_REGMAP and updates the driver output on its falling edge. The pattern loops

if SYNC is pulsed. The maximum SYNC rate for APG mode is 20 MHz.

In HVDAC_DATA_REGMAP, each 14 bit level is stored in a combination of two 8 bit registers, containing the low

order byte and high order byte. For example, the first level in the pattern is stored in HVDAC_DATA_BYTE_00 and

HVDAC_DATA_BYTE_01, If the first level is 14 bit binary sequence ��

13��12��11��10��9��8��7��6��5��4��3��2��1��0,

HVDAC_DATA_BYTE_00 contains the 8 low order bits (binary ��

7��6��5��4��3��2��1��0), and HVDAC_DATA_BYTE_01

contains the 8 high order bits (binary ��

∅��∅��13��12��11��10��9��8), where the first two bits are reserved. The second level

in the pattern is stored in HVDAC_DATA_BYTE_02 and HVDAC_DATA_BYTE_03, and so forth.

The default pattern memory value produces a 4-level, ±20 V up-down sequential staircase waveform at a frequency

defined by the SYNC clock rate, as shown in Figure 62. These default values may be overwritten through SPI. The

APG mode generates analog pattern of up to 16 sequential voltage levels. The pulse width for each voltage level is

defined by the SYNC clock rate and can be calculated by:

�� ℎ =

��

# ��

Assume the SYNC clock rate is 1 MHz and the output is a 2-level sequential pulse, the pulse width is:

�� ℎ =

1 ��

= 0.5 ��

Figure 62. APG Mode Reference Example

EXTERNAL

INPUT

200016

300016

200016

100016

200016

20V

–20V

AD8460 Datasheet(PDF) 32 Page - Analog Devices

AD8460 Datasheet(HTML) 32 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75

Datasheet Download

Link URL