AD8460 datasheet(39/75 Pages) AD

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Data Sheet

AD8460

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Rev.0

39 of 75

SHUTDOWN CONTROL (SDN_IO)

The HV-HI output driver is disabled when SDN_IO is high. As directed in the power-up section, it is recommended to

power-up with SDN_IO high so that the output driver is in shutdown mode and then bringing SDN_IO low once the

desired AD8460 configuration is written over SPI. Subsequently, floating the SDN_IO pin enables the fault

monitoring and protection feature while the AD8460 remains on. SDN_IO sinks ~180 µA to override SDN_IO’s high

state.

When SDN_IO is floated, the driver is controlled by SPI commands. SDN_IO has both input and output functionality.

The user can drive the SDN_IO pin to enable/disable the amplifier or monitoring the SDN_IO. When SDN_IO is

floated or connected to a high impedance digital pin such as a microcontroller GPIO, SDN_IO serves as a flag for

any of the internal alarm conditions.

When SDN_IO is pulled high, the AD8460’s HVCC and HVEE supply currents are reduced to ~120 µA and the internal

high voltage driver is disabled. The output goes to high impedance (~27 kΩ). The shutdown state is latched and the

driver remains in shutdown even when SDN_IO is floated. To enable the AD8460 from shutdown, pulling SDN_IO

low and following by floating the SDN_IO is required to enable the shutdown protection features.

When SDN_IO is held low, the output is continuously enabled, and shutdown is inhibited. Use caution in this case

as the device is unprotected from overstress. Holding SDN_IO low disables the shutdown protection features.

DELAYED SHUTDOWN

The user may add delay to the AD8460’s shutdown response time to improve noise immunity, by means of an

external capacitor from SDN_IO to ground. The capacitor value is chosen so that the desired delay equals the time

required for the voltage on SDN_IO to ramp from 0 V to its threshold voltage of 2.5 V under a constant current of

180 μA. The capacitor value CSDNIO is calculated according to the relationship:

�� =

(180 �� × ��)

2.5 ��

where, t is the desired delay time.

Note: The chosen delay applies to all internally-detected alarms (current, voltage, and temperature).

For example, to add a 5 μs delay so that short duration current or voltage spikes do not cause a shutdown, a

capacitor is needed between SDN_IO and ground, with value:

�� =

(180 �� × 5 ��)

2.5 ��

= 360 ��

Note that parasitic capacitance on the PCB impacts the shutdown response time. The values seen in Figure 65 are

the total capacitance on the SDN_IO pin, which includes the PCB’s parasitic capacitance and added capacitor. In

this example, any alarm condition shorter than 5 μs in duration does not trigger a shutdown. Figure 65 shows the

AD8460’s shutdown response time vs. various capacitance.

Alarm latching is particularly useful when delayed shutdown is implemented. In the previous example, a fault of

less than 5 μs duration does not trigger a shutdown, but the occurrence of a fault may be of interest for

troubleshooting purposes. When the ALARM_LATCH is true (1), the states of the corresponding ALARM flags may be

polled through SPI to see if any faults are detected, even if the event is too short to force a shutdown.

AD8460 Datasheet(PDF) 39 Page - Analog Devices

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