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USB3500 Datasheet(PDF) 31 Page - SMSC Corporation

Part # USB3500
Description  Hi-Speed USB Host, Device or OTG PHY With UTMI Interface
PDF  46 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

USB3500 Datasheet(HTML) 31 Page - SMSC Corporation

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Hi-Speed USB Host, Device or OTG PHY With UTMI+ Interface
Datasheet
SMSC USB3500
31
Revision 1.0 (04-04-05)
DATASHEET
Chapter 7 Application Notes
The following sections consist of select functional explanations to aid in implementing the USB3500
into a system. For complete description and specifications consult the USB2.0 Transceiver Macrocell
Interface Specification and Universal Serial Bus Specification Revision 2.0.
7.1
Linestate
The voltage thresholds that the LINESTATE[1:0] signals use to reflect the state of DP and DM depend
on the state of XCVRSELECT. LINESTATE[1:0] uses HS thresholds when the HS transceiver is
enabled (XCVRSELECT = 0) and FS thresholds when the FS transceiver is enabled (XCVRSELECT
= 1). There is not a concept of variable single-ended thresholds in the USB2.0 specification for HS
mode.
The HS receiver is used to detect Chirp J or K, where the output of the HS receiver is always qualified
with the Squelch signal. If squelched, the output of the HS receiver is ignored. In the USB3500, as an
alternative to using variable thresholds for the single-ended receivers, the following approach is used.
In HS device mode, 3ms of no USB activity (IDLE state) signals a reset. The Link monitors
LINESTATE[1:0] for the IDLE state. To minimize transitions on LINESTATE[1:0] while in HS mode, the
presence of !Squelch is used to force LINESTATE[1:0] to a J state.
Table 7.1 Device Linestate States (DPPD & DMPD = 0)
STATE OF DP/DM LINES
LINESTATE[1:0]
FULL SPEED
XCVRSELECT[1:0]=01
TERMSELECT=1
HIGH SPEED
XCVRSELECT[1:0]=00
TERMSELECT=0
CHIRP MODE
XCVRSELECT[1:0]=00
TERMSELECT=1
LS[1]
LS[0]
0
0
SE0
Squelch
Squelch
0
1
FS-J
!Squelch
!Squelch &
HS Differential Receiver
Output
1
0
FS-K
Invalid
!Squelch &
!HS Differential Receiver
Output
1
1
SE1
Invalid
Invalid
Table 7.2 Host Linestate States (DPPD & DMPD = 1)
STATE OF DP/DM LINES
LINESTATE[1:0]
LOW SPEED
XCVRSEL[1:0]=10
TERMSELECT=1
FULL SPEED
XCVRSEL[1:0]=01
TERMSELECT=1
HIGH SPEED
XCVRSEL[1:0]=00
TERMSELECT=0
OPMODE=00/01
CHIRP MODE
XCVRSEL[1:0]=00
TERMSELECT=0
OPMODE=10
LS[1]
LS[0]
0
0
SE0
SE0
Squelch
Squelch
0
1
LS-K
FS-J
!Squelch
!Squelch &
HS Differential
Receiver Output



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