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LT8277 Datasheet(PDF) 21 Page - Analog Devices |
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LT8277 Datasheet(HTML) 21 Page - Analog Devices |
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21 / 31 page ![]() Data Sheet LT8277 analog.com Rev 0 21 of 31 Using ENABLE For simple on/off functionality, drive the ENABLE pin with a logic signal using VIL= 0.4V and VIH = 1.4V. To create an accurate input undervoltage lockout (UVLO), connect the ENABLE pin to the center of a resistive voltage divider from the input voltage to ground. When the voltage at ENABLE falls below VENABLE_FALLING, the part will shut down. While the part is shut down, the supply current is significantly reduced, and switching stops. A small current is drawn into the ENABLE pin in the off state to enable programmable hysteresis, as shown in Figure 33. Figure 33. Resistor Network for Accurate UVLO ������������������������������������������,������������������������������������������ = 1.26 ∙ (1 + ������1 ������2 ) (9) ������������������������������������������,������������������������������������ = 1.32 ∙ (1 + ������1 ������2 ) + 2.5µ������ ∙ ������1 (10) Multichip Operation Each LT8277 controls two phases of a power converter that are interleaved 180° apart. Note that the two phases are not independent channels; they both provide current to the same output node and, within the specified matching limits, contribute the same current to the load. The upper and lower limits of the VC pin range are well controlled, allowing multiple LT8277 devices to share a single compensation network. This allows additional phases to be included, each contributing the same current as in the 2-phase case. A set of small, 100pF or so, capacitors placed locally for each IC in the system between VC and ground can improve phase-to-phase peak current matching. To ensure appropriate phase separation, use the CLKOUT pin of one LT8277 to drive the SYNC/SPRD input of a subsequent device, as shown in Figure 34. Be sure to configure the SPI interface to enable CLKOUT and select the appropriate phase angle. For a 4-phase operation, choose 90°, and for an 8-phase operation, choose 45°. All phases must receive the same SPI command and monitor the same output voltage. For 4-phase and 8-phase operation, the SYNC/SPRD pin for the first chip in the line acts as the external synchronization and internal SSFM control pin for the system. Multiphase operation relaxes input and output capacitance requirements for a given switching frequency and ripple voltage. In addition, for high-power applications, having multiple power devices can aid in thermal management and reduce EMI compared to a single-phase case. See the component selection guides for details about multiphase component selection. Multiphase operation can degrade light-load efficiency and lead to pulse skipping earlier than the single-phase case. To address this, when the voltage at VC falls below where it would set peak inductor current around 1/8 of the programmed current limit, LT8277 will shut down its second phase. The second phase will resume operation when the voltage at VC exceeds the point where it will set peak inductor current around 1/4 of the programmed current limit. The SPI interface provides a bit to force the second phase to continue operating at light load. This does not prevent pulse skipping at a very light load for either phase. VIN R1 R2 LT8277 ENABLE |
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