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TDP2004 Datasheet(PDF) 6 Page - Texas Instruments |
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TDP2004 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 29 page ![]() 5 Specifications 5.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT VCCABSMAX Supply voltage (VCC) –0.5 4.0 V VIOCMOS,ABSMAX 3.3 V LVCMOS and open drain I/O voltage –0.5 4.0 V VIO5LVL,ABSMAX 5-level input I/O voltage –0.5 2.75 V VIOHS-RX,ABSMAX High-speed I/O voltage (RXnP, RXnN) –0.5 3.2 V VIOHS-TX,ABSMAX High-speed I/O voltage (TXnP, TXnN) –0.5 2.75 V TJ,ABSMAX Junction temperature 150 °C Tstg Storage temperature range –65 150 °C (1) Operation outside the Absolute Maximum Rating may cause permanent device damage. Absolute Maximum Rating do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Condition. If used outside the Recommended Operating Condition but within the Absolute Maximum Rating, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime. 5.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) ±500 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Pins listed as ±2 kV may actually have higher performance. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 5.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VCC Supply voltage, VCC to GND DC plus AC power should not exceed these limits 3.0 3.3 3.6 V NVCC Supply noise tolerance DC to <50 Hz, sinusoidal1 250 mVpp 50 Hz to 500 kHz, sinusoidal1 100 mVpp 500 kHz to 2.5 MHz, sinusoidal1 33 mVpp Supply noise, >2.5 MHz, sinusoidal1 10 mVpp TRampVCC VCC supply ramp time From 0 V to 3.0 V 0.150 100 ms TA Operating ambient temperature TDP2004 0 70 °C TDP2004I -40 85 °C TJ Operating junction temperature TDP2004 105 °C TDP2004I 125 °C PWLVCMOS Minimum pulse width required for the device to detect a valid signal on LVCMOS inputs PD and READ_EN_N 200 μs VCCSMBUS SMBus/I2C SDA and SCL open drain termination voltage Supply voltage for open drain pull-up resistor 3.6 V FSMBus SMBus/I2C clock (SCL) frequency SMBus secondary mode 10 400 kHz VIDLAUNCH Source launch amplitude Differential signaling 1200 mVpp DR Data rate 1 20 Gbps TDP2004 SNLS745 – NOVEMBER 2023 www.ti.com 6 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: TDP2004 |
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