6 Detailed Description

6.1 Overview

The TDP2004 is a four-channel multi-rate linear repeater with integrated signal conditioning. The device's signal

channels operate independently from one another. Each channel includes a continuous-time linear equalizer

(CTLE) and a linear output driver, which together compensate for a lossy transmission channel between the

source transmitter and the final receiver. The linearity of the data path is specifically designed to preserve any

transmit equalization while keeping receiver equalization effective.

The TDP2004 can be configured three different ways:

Pin mode – device control configuration is done solely by strap pins. Pin mode is expected to be good enough

for many system implementation needs.

SMBus/I2C Primary mode – device control configuration is read from external EEPROM. When the TDP2004

has finished reading from the EEPROM successfully, it will drive the DONEn pin LOW. SMBus/I2C secondary

operation is available in this mode before, during, or after EEPROM reading. Note: during EEPROM reading, if

the external SMBus/I2C primary wants to access TDP2004 registers, then it must support arbitration. The mode

is preferred when software implementation is not desired.

SMBus/I2C Secondary mode – provides most flexibility. Requires a SMBus/I2C primary device to configure

TDP2004 though writing to its secondary address.

6.2 Functional Block Diagram

GAIN/SDA

TEST/SCL

EQ1/ADDR1

READ_EN_N

DONEn

EQ0/ADDR0

VCC

MODE

PD

Shared Digital Core

Power-On Reset

Always-On 10MHz

GND

RX3P

RX3N

CTLE

Linear

Driver

TX3P

TX3N

RX2P

RX2N

CTLE

Linear

Driver

TX2P

TX2N

Term

Term

Term

Term

RX1P

RX1N

CTLE

Linear

Driver

TX1P

TX1N

RX0P

RX0N

CTLE

Linear

Driver

TX0P

TX0N

Term

Term

Term

Term

TDP2004

Voltage

Regulator

6.3 Feature Description

6.3.1 Linear Equalization

The TDP2004 receivers feature a continuous-time linear equalizer (CTLE) that applies high-frequency boost

and low-frequency attenuation to help equalize the frequency-dependent insertion loss effects of the passive

channel. The receivers implement two stage linear equalizer for wide range of equalization capability. The

equalizer stages also provide flexibility to make subtle modifications of mid-frequency boost for best EQ gain

profile match with wide range of channel media characteristics. The EQ profile control feature is only available in

SMBus/I2C mode. In Pin mode the settings are optimized for FR4 traces.

www.ti.com

TDP2004

SNLS745 – NOVEMBER 2023

Copyright © 2023 Texas Instruments Incorporated

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Product Folder Links: TDP2004