www.ti.com

APPLICATION INFORMATION

TYPICAL APPLICATION CIRCUIT

L2

EN_DCDC1

VCC

FB_DCDC2

PGND2

AGND

EN_LDO1

EN_DCDC2

VLDO2

200mA LDO

VLDO2

VLDO3

DCDC1(I/O)

STEP- DOWN

CONVERTER

1 A

VINDCDC1/2

L1

FB_DCDC1

PGND1

DCDC2(core)

STEP- DOWN

CONVERTER

600mA

VLDO1

400mA LDO

VLDO3

200mA LDO

VDCDC1

VIN_LDO1

VIN_LDO2/3

Vbat

2.2 H

m

10 F

m

2.2 F

m

1 F

m

1W

TPS 65053

EN_LDO2

EN_LDO3

FB2

MODE

THRESHOLD

RESET

Reset

Cff

Cff

R 1

R 2

R 3

R 4

R7

R 8

R19

I/Ovoltage

4.7 F

m

R 5

R 6

VLDO1

FB1

Vbat

Vbat

2.8 V

1.8 V

1.6 V

1.3 V

3.3 V

VDCDC1

R 9

R10

Vbat

2.2 F

m

10 F

m

22 F

m

2.2 H

m

Output Voltage Setting

V

1 )

R1

R2

(4)

R1 + R2

V

OUT

V

FB_DCDC1

* R2

(5)

TPS65053

SLVS754 – MARCH 2007

The output voltage of the DCDC converters can be set by an external resistor network and can be calculated to:

It is recommended to set the total resistance of R1 + R2 to less than 1M

Ω. The resistor network connects to the

input of the feedback amplifier; therefore, need some small feedforward capacitor in parallel to R1. A typical

value of 47pF is sufficient.

16

Submit Documentation Feedback