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PCD8544 Datasheet(PDF) 6 Page - NXP Semiconductors |
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PCD8544 Datasheet(HTML) 6 Page - NXP Semiconductors |
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6 / 32 page ![]() 1999 Apr 12 6 Philips Semiconductors Product specification 48 × 84 pixels matrix LCD controller/driver PCD8544 7 FUNCTIONAL DESCRIPTION 7.1 Oscillator The on-chip oscillator provides the clock signal for the display system. No external components are required and the OSC input must be connected to VDD. An external clock signal, if used, is connected to this input. 7.2 Address Counter (AC) The address counter assigns addresses to the display data RAM for writing. The X-address X6 to X0 and the Y-address Y2 to Y0 are set separately. After a write operation, the address counter is automatically incremented by 1, according to the V flag. 7.3 Display Data RAM (DDRAM) The DDRAM is a 48 × 84 bit static RAM which stores the display data. The RAM is divided into six banks of 84 bytes (6 × 8 × 84 bits). During RAM access, data is transferred to the RAM through the serial interface. There is a direct correspondence between the X-address and the column output number. 7.4 Timing generator The timing generator produces the various signals required to drive the internal circuits. Internal chip operation is not affected by operations on the data buses. 7.5 Display address counter The display is generated by continuously shifting rows of RAM data to the dot matrix LCD through the column outputs. The display status (all dots on/off and normal/inverse video) is set by bits E and D in the ‘display control’ command. 7.6 LCD row and column drivers The PCD8544 contains 48 row and 84 column drivers, which connect the appropriate LCD bias voltages in sequence to the display in accordance with the data to be displayed. Figure 2 shows typical waveforms. Unused outputs should be left unconnected. |
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