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MS1100 Datasheet(PDF) 6 Page - List of Unclassifed Manufacturers |
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MS1100 Datasheet(HTML) 6 Page - List of Unclassifed Manufacturers |
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6 / 16 page ![]() MS1100 Hangzhou Ruimeng Technology Co.,Ltd VERSION : V1.10 2023.05.22 http://www.relmon.com - PAGE 6 - FUNCTION DESCRIPTION The MS1100 is a 16-bit, fully differential, delta-sigma analog-to-digital converter. The MS1100 consists of a delta-sigma A/D converter with adjustable gain, a 2.048V voltage reference, a clock oscillator, a digital filter and an I2C interface. It has easy design and configuration, so users can easily achieve accurate measurement Analog-to-Digital Converter The MS1100 A/D converter core consists of a differential switched-capacitor delta-sigma modulator and a digital filter. The modulator measures the voltage difference between the positive and negative analog inputs and compares it to reference voltage, which is 2.048V in the MS1100. The digital filter receives a high-speed bit stream from the modulator and outputs digital signal, which is proportional to the input voltage. Voltage Reference The MS1100 has a 2.048V on-board voltage reference without need for external reference. Output Code Calculation The number of bits for the MS1100 depends on update rate, as shown in Table 1. Table 1. Minimum and Maximum Codes Update Rate Number Of Bits Minimum Code Maximum Code 15SPS 16 -32768 32767 30SPS 15 -16384 16383 60SPS 14 -8192 8191 240SPS 12 -2048 2047 The output code of the MS1100 is in binary two’s complement format, right-justified and sign-extended. Table 2 shows the output codes for various input levels. Table 2. Output Codes for Different Input Signals Data Rate Differential Input Signal -2.048V -1LSB 0 (Ideal) +1LSB +2.048V 15SPS 8000H FFFFH 0000H 0001H 7FFFH 30SPS C000H FFFFH 0000H 0001H 3FFFH 60SPS E000H FFFFH 0000H 0001H 1FFFH 240SPS F800H FFFFH 0000H 0001H 07FFH Note 1: Differential input; do not drive the MS1100 absolute inputs below −200mV. The output code is given by the expression: Output Code = -1×Minimum Code×PGA× ( ) ( ) IN+ IN- V - V 2.048V ..............................(VIN+<VIN-) Output Code = 1×Maximum Code×PGA× ( ) ( ) IN+ IN- V - V 2.048V ..............................(VIN+≥VIN-) The maximum code is 2n-1 -1, while the minimum code is -1×2n-1. |
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