REV. 0

–4–

AD9948

TIMING SPECIFICATIONS

Parameter

Symbol

Min

Typ

Max

Unit

MASTER CLOCK (CLI) (See Figure 4)

CLI Clock Period

40

ns

CLI High/Low Pulsewidth

16

20

24

ns

Delay from CLI to Internal Pixel

Period Position

6ns

CLPOB Pulsewidth (Programmable)

*

220

Pixels

SAMPLE CLOCKS (See Figure 6)

SHP Rising Edge to SHD Rising Edge

17

20

ns

DATA OUTPUTS (See Figures 7a and 7b)

Output Delay From Programmed Edge

6ns

Pipeline Delay

11

Cycles

SERIAL INTERFACE

Maximum SCK Frequency

10

MHz

SL to SCK Setup Time

10

ns

SCK to SL Hold Time

10

ns

SDATA Valid to SCK Rising Edge Setup

10

ns

SCK Falling Edge to SDATA Valid Hold

10

ns

SCK Falling Edge to SDATA Valid Read

10

ns

*Minimum CLPOB pulsewidth is for functional operation only. Wider typical pulses are recommended to achieve low noise clamp reference.

Specifications subject to change without notice.

ABSOLUTE MAXIMUM RATINGS

*

With

Parameter

Respect To

Min

Max

Unit

AVDD, TCVDD

AVSS

–0.3

+3.9

V

HVDD, RGVDD

HVSS, RGVSS

–0.3

+3.9

V

DVDD, DRVDD

DVSS, DRVSS

–0.3

+3.9

V

Any VSS

Any VSS

–0.3

+0.3

V

Digital Outputs

DRVSS

–0.3

DRVDD + 0.3

V

CLPOB/PBLK, HBLK

DVSS

–0.3

DVDD + 0.3

V

SCK, SL, SDATA

DVSS

–0.3

DVDD + 0.3

V

RG

RGVSS

–0.3

RGVDD + 0.3

V

H1–H4

HVSS

–0.3

HVDD + 0.3

V

REFT, REFB, CCDIN

AVSS

–0.3

AVDD + 0.3

V

Junction Temperature

150

°C

Lead Temperature (10 sec)

300

°C

*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any other conditions above those listed in the operational sections

of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect

device reliability.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection. Although

the AD9948 features proprietary ESD protection circuitry, permanent damage may occur on

devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are

recommended to avoid performance degradation or loss of functionality.

ORDERING GUIDE

Temperature

Package

Package

Model

Range

Description

Option

AD9948KCP

–20

°C to +85°C

LFCSP

CP-40

AD9948KCPRL

–20

°C to +85°C

LFCSP

CP-40

AD9948KCPZ

*

–20

°C to +85°C

LFCSP

CP-40

AD9948KCPZRL

* –20

°C to +85°C

LFCSP

CP-40

*This is a lead free product.

THERMAL CHARACTERISTICS

Thermal Resistance

40-Lead LFCSP Package

°C/W*

soldered to the board.