TMD2636 datasheet(12/48 Pages) OSRAM

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Datasheet, Public

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[v2-00] 2023-Jan-04

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TMD2636 − Detailed Description

the final byte the master places an ACK on the bus (9TH clock

pulse). Termination of the Read transaction is indicated by a

NACK being placed on the bus by the master, followed by STOP.

The I²C bus protocol was developed by Philips (now NXP). For

a complete description of the I²C protocol, please review the

NXP I²C design specification at:

https://www.i2c-bus.org/references/

Simplified State Diagram

Figure 13:

Simplified State Diagram

SLEEP

(PON = 0)

Hardware

Averaging

Loop 2 to 128

Times

IDLE

(PON = 1)

ACTIVE

Complete

PRATE

PROX_AVG

(if enabled)

PWTIME

(if enabled)

Update

PDATA

SAI

(if enabled)

Wait

Time

If moving average (PMAVG)

is enabled, PDATA = 0 until

filter fills with 2/4/8 loops

PEN = 1

Idle

Sleep

Active

IDD Supply

Current

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