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TMD2636 Datasheet(PDF) 14 Page - OSRAM GmbH |
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TMD2636 Datasheet(HTML) 14 Page - OSRAM GmbH |
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14 / 48 page ![]() Datasheet, Public Page 13 [v2-00] 2023-Jan-04 Document Feedback TMD2636 − Register Description Note(s): 1. R = Read Only, W = Write Only, R/W = Read or Write, SC = Self Clearing after access ENABLE Register (0x80) Figure 15: ENABLE Register Before activating PEN, preset each applicable operating mode register and bits. PRATE Register (0x82) Figure 16: PRATE Register 0xDD INTENAB R/W Interrupt enables 0x00 0xE5 FAC_L R Factory data low (lot code data) 0x00 to 0xFF 0xE6 FAC_H R Factory data high (lot code data) 0x00 to 0xFF 0xF9 TEST9 R/W Test nine (must be set to 0x07) 0x00 Addr: 0x80 ENABLE Bit Bit Name Default Access Bit Description 7:5 Reserved 000 RW Reserved. Must be set to default value 4PWEN 0 RW This bit activates the proximity wait feature which is set by the PWTIME register. Active high. 3 Reserved 0 RW Reserved. Must be set to default value 2 PEN 0 RW This bit activates the proximity detection. Active high. 1 Reserved 0 RW Reserved. Must be set to default value 0PON 0 RW This field activates the internal oscillator and ADC channel. Active high. Addr: 0x82 PRATE Bit Bit Name Default Access Bit Description 7:0 PRATE 0x1F RW This register defines the duration of 1 proximity sample, which is (PRATE + 1)*88μs. Address Register Name R/W Register Function Reset Value |
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