TMD2636 datasheet(23/48 Pages) OSRAM

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Page 22

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[v2-00] 2023-Jan-04

TMD2636 − Register Description

REVID2 Register (0xA6)

Figure 30:

REVID2 Register

SOFTRST Register (0xA8)

Figure 31:

SOFTRST Register

PWTIME Register (0xA9)

Figure 32:

PWTIME Register

Addr: 0xA6

REVID2

Bit

Bit Name

Default

Access

Bit Description

7:4

Reserved

0000

Reserved

3:0

VER_ID

0011 or 1100

Device version number

Addr: 0xA8

SOFTRST

Bit

Bit Name

Default

Access

Bit Description

7:1

Reserved

0000000

Reserved. Must be set to default value.

0SOFTRST

Writing a 1 to this bit will cause all registers to be reset to

their default state. This will immediately terminate all

device operation and put the device into the sleep state.

Addr: 0xA9

PWTIME

Bit

Bit Name

Default

Access

Bit Description

7:0

PWTIME

0x00

Value that specifies the wait time in 2.78ms

increments.

Value

Increment

Wait Time

0x00

2.78ms (33.4ms)

0x01

5.56ms (66.7ms)

0x11

50.0ms (600ms)

0x23

100ms (1.20s)

0x3F

178ms (2.14s)

0xFF

256

712ms (8.54s)

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