TMD2636 datasheet(17/48 Pages) OSRAM

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[v2-00] 2023-Jan-04

TMD2636 − Register Description

PERS Register (0x8C)

Figure 21:

PERS Register

The frequency of consecutive proximity channel results outside

of threshold limits are counted; this count value is compared

against the PPERS value. If the counter is equal to the PPERS

value an interrupt is asserted. Any time a proximity channel

result is inside the threshold values the counter is cleared.

CFG0 Register (0x8D)

Figure 22:

CFG0 Register

Addr: 0x8C

PERS

Bit

Bit Name

Default

Access

Bit Description

7:4

Reserved

(0000)

Reserved. Must be set to default value.

3:0

PPERS

(0000)

This register sets the proximity persistence filter.

Value

Interrupt

0 (0000)

Every proximity cycle

1 (0001)

Any value outside proximity thresholds

2 (0010)

2 consecutive proximity values out of range

3 (0011)

3 consecutive proximity values out of range

...

15 (1111)

15 consecutive proximity values out of range

Addr: 0x8D

CFG0

Bit

Bit Name

Default

Access

Bit Description

7:4

Reserved

0100

Reserved. Must be set to default value.

3PWLONG

When PWLONG (PROX Wait Long) is asserted the wait

period as set by PWTIME is increased by a factor of 12.

2:0

Reserved

000

Reserved. Must be set to default value.

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