56F807 datasheet(22/60 Pages) FREESCALE

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56F807 Technical Data Technical Data, Rev. 15

Freescale Semiconductor

Notes:

Theta-JA determined on 2s2p test boards is frequently lower than would be observed in an application.

Determined on 2s2p thermal test board.

Junction to ambient thermal resistance, Theta-JA (RθJA) was simulated to be equivalent to the JEDEC

specification JESD51-2 in a horizontal configuration in natural convection. Theta-JA was also simulated on

a thermal test board with two internal planes (2s2p where “s” is the number of signal layers and “p” is the

number of planes) per JESD51-6 and JESD51-7. The correct name for Theta-JA for forced convection or with

the non-single layer boards is Theta-JMA.

Junction to case thermal resistance, Theta-JC (RθJC ), was simulated to be equivalent to the measured values

using the cold plate technique with the cold plate temperature used as the “case” temperature. The basic cold

plate measurement technique is described by MIL-STD 883D, Method 1012.1. This is the correct thermal

metric to use to calculate thermal performance when the package is being used with a heat sink.

Voltage difference VSS to VSSA

ΔV

-0.1

0.1

ADC reference voltage

VREF

2.7

–

VDDA

Ambient operating temperature

–40

–

°C

Table 3-3 Thermal Characteristics6

Characteristic

Comments

Symbol

Value

Unit

Notes

160-pin

LQFP

160

MBGA

Junction to ambient

Natural convection

RθJA

38.5

63.4

°C/W

Junction to ambient (@1m/sec)

RθJMA

35.4

60.3

°C/W

Junction to ambient

Natural convection

Four layer

board (2s2p)

RθJMA

(2s2p)

49.9

°C/W

1,2

Junction to ambient (@1m/sec)

Four layer

board (2s2p)

RθJMA

31.5

46.8

°C/W

1,2

Junction to case

RθJC

8.6

8.1

°C/W

Junction to center of case

0.8

0.6

°C/W

4, 5

I/O pin power dissipation

P I/O

User Determined

Power dissipation

P D

P D = (IDD x VDD + P I/O)W

Junction to center of case

PDMAX

(TJ - TA) /R

θJA

Table 3-2 Recommended Operating Conditions

Characteristic

Symbol

Min

Typ

Max

Unit

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