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56F807 Datasheet(PDF) 44 Page - Freescale Semiconductor, Inc |
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56F807 Datasheet(HTML) 44 Page - Freescale Semiconductor, Inc |
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44 / 60 page ![]() 56F807 Technical Data Technical Data, Rev. 15 44 Freescale Semiconductor 3.11 Analog-to-Digital Converter (ADC) Characteristics Table 3-16 ADC Characteristics Operating Conditions: VSS = VSSA = 0 V, VDD = VDDA = 3.0–3.6 V, VREF = VDD-0.3V, ADCDIV = 4, 9, or 14, (for optimal performance), ADC clock = 4MHz, 3.0–3.6 V, TA = –40° to +85°C, CL ≤ 50pF, fOP = 80MHz Characteristic Symbol Min Typ Max Unit ADC input voltages VADCIN 01 1. For optimum ADC performance, keep the minimum VADCIN value > 25mV. Inputs less than 25mV may convert to a digital output code of 0. — VREF 2 2. VREF must be equal to or less than VDDA and must be greater than 2.7V. For optimal ADC performance, set VREF to VDDA-0.3V. V Resolution RES 12 — 12 Bits Integral Non-Linearity3 3. Measured in 10-90% range. INL — +/- 2.5 +/- 4 LSB4 4. LSB = Least Significant Bit. Differential Non-Linearity DNL — +/- 0.9 +/- 1 LSB4 Monotonicity GUARANTEED ADC internal clock5 5. Guaranteed by characterization. fADIC 0.5 — 5 MHz Conversion range RAD VSSA —VDDA V Conversion time tADC —6 — tAIC cycles 6 6. tAIC = 1/fADIC Sample time tADS —1 — tAIC cycles 6 Input capacitance CADI —5 — pF6 Gain Error (transfer gain)5 EGAIN 0.93 1.00 1.08 — Total Harmonic Distortion5 THD 60 64 — Offset Voltage5 VOFFSET -90 -25 +10 mV Signal-to-Noise plus Distortion5 SINAD 55 60 — — Effective Number of Bits5 ENOB 9 10 — bit Spurious Free Dynamic Range5 SFDR 65 70 — dB Bandwidth BW — 100 — KHz ADC Quiescent Current (each dual ADC) IADC —50 — mA VREF Quiescent Current (each dual ADC) IVREF —12 16.5 mA |
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