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EM65567AF Datasheet(PDF) 53 Page - ELAN Microelectronics Corp |
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EM65567AF Datasheet(HTML) 53 Page - ELAN Microelectronics Corp |
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53 / 93 page ![]() Preliminary EM65567 66 COM/ 96 SEG 256 Color STN LCD Driver * This specification is subject to be changed without notice. 2003/1/9 (V0.1) 53 8.2 Functions of Control Registers The EM65567 has many control registers. In case of control register access, upper nibble of data bus (D7~D4) represent register address, lower nibble of data bus (D3~D0) represent data. The access example is shown in the following. The Pins (CSB, RS, RDB, WRB) setting are for 80-family MPU interface. Only the setting of terminal (RDB,WRB) is different, when it is accessed by the 68-fanily MPU. (Example) X Address D7 D6 D5 D4 D3 D2 D1 D0 CSB RS RDB WRB RE2 RE1 RE0 0000 AX3 AX2 AX1 AX0 0110000 Register address Data Pins setting Register Bank In the writing to the control register, it is used directly as addressing D7~D4 of the data bus. In case of register read, first set RA register for specific register address, next can read specific register. Therefore, it is need 2-step for register read. Then, specific register output to D3~D0 of data bus. Except D3~D0 of data bus are all “H”. Prohibit access to undefined register address area. When RS is “L”, all read/write operations are accessed to display RAM. Then data bus doesn’t include register address. In case of write, D3~D0 data is written to the register designated at D7~D4 in rising edge of the WRB signal. In case of read, register can output to data bus is RDB active period. Control register and display RAM are the equal access timing. 8.2.1 Data Write to Display RAM D7 D6 D5 D4 D3 D2 D1 D0 CSB RS RDB WRB RE2 RE1 RE0 Display RAM write data 0010 0/1 0/1 0/1 The Display RAM data of 8-bit are written in the designated X and Y address. 8.2.2 Data Read from Display RAM D7 D6 D5 D4 D3 D2 D1 D0 CSB RS RDB WRB RE2 RE1 RE0 Display RAM read data 0001 0/1 0/1 0/1 The 8-bit contents of Display RAM designated in X. and Y address and read out. Immediately after data are set in X and Y address, dummy read is necessary one time. 8.2.3 Internal Register Data Read D7 D6 D5 D4 D3 D2 D1 D0 CSB RS RDB WRB RE2 RE1 RE0 ※※※※ Internal Register read data 0101 0/1 0/1 0/1 ※ Mark shows “Don’t care” This command is used to read data from an internal register. Before executing the command. You need to set the address and RE flag for reading data from the internal register. 8.2.4 X Address Register Set D7 D6 D5 D4 D3 D2 D1 D0 CSB RS RDB WRB RE2 RE1 RE0 0000 AX3 AX2 AX1 AX0 0110000 |
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