EM65567AF datasheet(71/93 Pages) EMC

71 / 93 page

Preliminary

EM65567

66 COM/ 96 SEG 256 Color STN LCD Driver

* This specification is subject to be changed without notice.

2003/1/9 (V0.1)

PWM = “0”: Variable display mode using 8 gradations selected from 32 gradations

PWM = “1”: 8-gradation fixed display mode

8.2.20 RAM Data Length Set

CSB

RDB WRB RE2

RE1

RE0

100

※※

※

WLS

0110100

(At the time of reset: {WLS} = 0H, read address: 9H)

※

Mark shows “Don’t care”

The WLS register select data bus size for access from MPU

WLS = “0”: The data bus size is 8-bits width

WLS = “1”: The data bus size is 16-bits width

When MPU access to control register using 16-bits bus size, high byte data is ignored.

8.2.21 Electronic Volume Register Set

CSB

RDB WRB RE2

RE1

RE0

101

DV3 DV2 DV1 DV0

0110100

(Read address: AH)

CSB

RDB WRB RE2

RE1

RE0

101

※

DV6 DV5 DV4

0110100

(Read address: BH)

(At the time of reset: {DV6~DV0} = 00H)

※

Mark shows “Don’t care”

The DV register can control V0 voltage.

The DV register has 7-bits, so can select 128 level voltage.

DV6

DV5

DV4

DV3

DV2

DV1

DV0

Output voltage

Smaller

：

Larger

The output voltage at VREG is specified by equation (1).

VREG = VREF * N * 0.9-----------------------------------------------------------(1)

(N: Number of boosting steps)

The LCD driver voltage V0 is determined by VREG level and electronic volume code equation (2).

V0 = 0.5 * VREG + M * (VREG – 0.5VREG) / 127 --------------------------(2)

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