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EM65567AF Datasheet(PDF) 84 Page - ELAN Microelectronics Corp |
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EM65567AF Datasheet(HTML) 84 Page - ELAN Microelectronics Corp |
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84 / 93 page ![]() Preliminary EM65567 66 COM/ 96 SEG 256 Color STN LCD Driver * This specification is subject to be changed without notice. 2003/1/9 (V0.1) 84 (6) Display control timing LP FLM CLK M tCLKH tDLP tDLP tCLKL tLPHW tDFLM tDM tDFLM tLPLW Input timing (Slave mode) VSS=0V , VDD = 2.4~3.3V , Ta = -30~+85℃ Item Symbol Condition Min. Typ. Max. Unit Pin used CLK pulse “H” width tCLKH 1.6 µs CLK pulse “L” width tCLKL 1.6 µs CLK LP pulse “H” width tLPHW 80 µs LP pulse “L” width tLPLW 80 µs LP delay time tDLP -1 1 µs LP FLM delay time tDFLM -1 1 µs FLM M delay time tDM -1 1 µs M Input timing (Slave mode) VSS=0V , VDD = 1.8~2.4V , Ta = -30~+85℃ Item Symbol Condition Min. Typ. Max. Unit Pin used CLK pulse “H” width tCLKH 1.6 µs CLK pulse “L” width tCLKL 1.6 µs CLK LP pulse “H” width tLPHW 80 µs LP pulse “L” width tLPLW 80 µs LP delay time tDLP -1 1 µs LP FLM delay time tDFLM -1 1 µs FLM M delay time tDM -1 1 µs M output timing (Master mode) VSS=0V , VDD = 2.4~3.3V , Ta = -30~+85℃ Item Symbol Condition Min. Typ. Max. Unit Pin used LP delay time tDLP 10 500 ns LP FLM delay time tDFLM 10 500 ns FLM M delay time tDM CL =15 pF 10 500 ns M output timing (Master mode) VSS=0V , VDD = 1.8~2.4V , Ta = -30~+85℃ Item Symbol Condition Min. Typ. Max. Unit Pin used LP delay time tDLP 10 1000 µs LP FLM delay time tDFLM 10 1000 µs FLM M delay time tDM CL =15 pF 10 1000 µs M Note: All the timings must be specified relative to 20% and 80% of VDD voltage. |
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