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33291 Datasheet(PDF) 19 Page - Freescale Semiconductor, Inc |
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33291 Datasheet(HTML) 19 Page - Freescale Semiconductor, Inc |
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19 / 26 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 19 33291 FUNCTIONAL DESCRIPTION An Output OFF Open Load Fault is indicates when the output voltage is less than the Output Threshold Voltage (VTHRES) of 0.6 to 0.8 x VDD. Since the 33291 outputs function as switches, during normal operation, each MOSFET output should either be completely turned ON or OFF. By design, the threshold voltage was selected to be between the ON and OFF voltage of the MOSFET. During normal operation, the ON state VDS voltage of the MOSFET is less than the threshold voltage and the OFF state VDS voltage is greater than the threshold voltage. This design approach affords using the same threshold comparator for Output Open Load Detect in the OFF state and Short Circuit Detect in the ON state. (See Figure 20 for an understanding of the Short Circuit Detect circuit.) With VDD = 5.0 V, an OFF state output voltage of less than 3.0 V will be detected as an Output OFF Open Load Fault while voltages greater than 4.0 V will not be detected as a fault. The 33291 has an internal pull-down current source of 50 µA, illustrated in Figure 19, page 18, between the MOSFET drain and ground. This current source prevents the output from floating up to VPWR if there is an open load or internal wire bond failure. The internal comparator compares the drain voltage with a reference voltage, VTHRES (0.6 to 0.8 x VDD). If the output voltage is less than this reference voltage, the 33291 will declare the condition to be an open load fault. During output switching, especially with capacitive loads, a false output OFF Open Load Fault may be triggered. To prevent this false fault from being reported, an internal fault filter in the range of 25 µs to 100 µs is incorporated. The duration in which a false fault may be reported is a function of the load impedance (RL,CL,LL), RDS(ON), and COUT of the MOSFET as well as the supply voltage (VPWR). The rising edge of CS triggers a built-in fault delay timer which must time out (25 µs or 100 µs) before the fault comparator is enabled to detect at faulted threshold. The circuit automatically returns to normal operation once the condition causing the Open Load Fault is removed. SHORTED LOAD FAULT A short load, or overcurrent fault can be caused by any output being shorted directly to supply, or an output experiencing a current greater than the current limit. There are three safety circuits progressively in operation during load short conditions providing system protection. They are as follows: 1. The output current of the device is monitored in an analog fashion using a SENSEFET approach and current limited. 2. The output current of the device is sensed by monitoring the MOSFET drain voltage. 3. The output thermal limit of the device is sensed and when attained causes only the specific faulted output to be latched OFF, allowing all remaining outputs to operate normally. All three protection mechanisms are incorporated in their output, affording robust independent output operation. The analog current limit circuit is always active and monitors the output drain current. An overcurrent condition causes the gate control circuitry to reduce the gate-to-source voltage imposed on the output MOSFET, re-establishing the load current in compliance with current limit (1.0 A to 3.0 A) range. The time required for the current limit circuitry to act is less than 20 µs. Therefore, currents higher than 1.0 A to 3.0 A will never be seen for more than 20 µs (a typical duration is 10 µs). If the current of an output attempts to exceed the predetermined limit of 1.0 A to 3.0 A (2.0 A nominal), the VDS voltage will exceed the VTHRES voltage and the overcurrent comparator will be tripped as shown in Figure 20. Figure 20. Short Circuit Detect and Analog Current Limiting Circuit The status of SFPD determines whether the 33291 will shut down immediately or continue to operate in an analog current limited mode until either the short circuit (overcurrent) condition is removed or thermal shutdown is reached. Grounding the SFPD pin will enable the short fault protection shutdown circuitry. Consider a load short (output short to supply) occurring on an output before, during, and after output turn ON. When the CS signal rises to the high logic state, the corresponding output is turned ON and a delay timer is activated. The duration of the delay timer is 70 µs to 250 µs. If the short circuit takes place before the output is turned ON, the delay experienced is the entire 70 µs to 250 µs followed by shutdown. If the short occurs during the delay time, the shutdown still occurs after the delay time has elapsed. However, if the short circuit occurs after the delay time, shutdown is immediate (within 20 µs after sensing). The purpose of the delay timer is to prevent false faults from being reported when switching capacitive loads. If the SFPD pin is at 5.0 V (or VDD), an output will not be disabled when an overcurrent is detected. The specific output will, within 5.0 µs to 10 µs of encountering the short circuit, go into an analog current limited mode. This feature is especially VThres 2.5 to 3.5 V + – High = Fault Output VPWR RL 33291 + – MOSFET ON Digital Analog Vref |
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