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DS9101 Datasheet(PDF) 7 Page - Analog Devices

Part # DS9101
Description  RTC iButton
PDF  13 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

DS9101 Datasheet(HTML) 7 Page - Analog Devices

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7
Analog Devices
Initialization
All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence
consists of a reset pulse transmitted by the bus controller followed by presence pulse(s) transmitted by
the peripheral(s). The presence pulse lets the bus controller know that the DS1904 is on the bus and is
ready to operate. For more details, see the 1-Wire Signaling section.
ROM Function Commands
Once the bus controller has detected a presence, it can issue one of the four ROM function commands
that the DS1904 supports. All ROM function commands are eight bits long. A list of these commands
follows (refer to flowchart in Figure 7):
Read ROM [33h]
This command allows the bus controller to read the DS1904’s 8-bit family code, unique 48-bit serial
number, and 8-bit CRC. This command should only be used if there is a single peripheral on the bus. If
more than one peripheral is present on the bus, a data collision will occur when all peripherals try to
transmit at the same time (open drain will produce a wired-AND result). The resultant family code and
48-bit serial number read by the controller will be invalid.
Match ROM [55h]
The match ROM command, followed by a 64-bit ROM sequence, allows the bus controller to address a
specific DS1904 on a multidrop bus. Only the DS1904 that exactly matches the 64-bit ROM sequence
will respond to the following clock function command. All peripherals that do not match the 64-bit ROM
sequence will wait for a reset pulse. This command can be used with a single or multiple devices on the
bus.
Search ROM [F0h]
When a system is initially brought up, the bus controller might not know the number of devices on the 1-
Wire bus or their 64-bit ROM codes. The search ROM command allows the bus controller to use a
process of elimination to identify the 64-bit ROM codes of all peripheral devices on the bus. The search
ROM process is the repetition of a simple 3-step routine: read a bit, read the complement of the bit, then
write the desired value of that bit. The bus controller performs this 3-step routine on each bit of the ROM.
After one complete pass, the bus controller knows the 64-bit ROM code of one device. Additional passes
will identify the ROM codes of the remaining devices. See Chapter 5 of the Book of iButton® Standards
for a comprehensive discussion of a search ROM, including an actual example.



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