TMDS442 datasheet(27/45 Pages) TI

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Sink Port Selection Register and Source Plug-In Status Register Description (Sub-Address)

Sink Port Register Bit Descriptions

TMDS442

SLLS757A – AUGUST 2006 – REVISED MARCH 2007

APPLICATION INFORMATION (continued)

connected to VCC for logic 1, GND for logic 0, or can be actively driven by TTL/CMOS logic levels. The device

addresses are set by the state of these pins and are not latched. Thus a dynamic address control system could

be utilized to incorporate several devices on the same system. Up to four TMDS442 devices can be connected

to the same I2C-Bus without requiring additional glue logic. Table 1 lists the possible addresses for the

TMDS442.

Table 1. TMDS442 Slave Addresses

FIXED ADDRESSES

SELECTABLE WITH ADDRESS PINS

READ/WRITE BIT

BIT 7 (MSB)

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2 (A1)

BIT 1 (A0)

BIT 0 (R/W)

The TMDS442 operates using only a single byte transfer protocol similar to Figure 27 and Figure 29. The

internal sub-address registers and the functionality of each can be found in Table 2. When writing to the device,

it is required to send one byte of data to the corresponding internal sub-address. If control of two sink ports and

source plug-in status is desired, then the master will have to cycle through the sub-addresses (sink ports) one at

a time as illustrated in the Example – Writing to the TMDS442 section for the proper procedure of writing to the

TMDS442.

During a read cycle, the TMDS442 sends the data in its selected sub-address in a single transfer to the master

device requesting the information. See the Example – Reading from the TMDS442 section of this document for

the proper procedure on reading from the TMDS442. Upon power up, the TMDS442 registers are in a default

value, 0000 0011.

Table 2. TMDS442 Sink Port and Source Plug-In Status Registers Selection

BIT ADDRESS (b7b6b5...b0)

Sink port 1

0000 0001

Sink port 2

0000 0010

Source plug-in status

0000 0011

Each bit of the first two sub-addresses, sink port 1 and port 2 control registers, allows the user to individually

control the functionality of the TMDS442. The benefit of this process allows the user to control the functionality

of each sink port independent of the other sink port. The bit description is decoded in Table 3.

Table 3. TMDS442 Sink Port Register Bit Decoder

BIT

FUNCTION

BIT VALUES

RESULT

7, 6, 5

Reserved

000

Default value

3dB De-emphasis off

PRE

3dB De-emphasis on

Sink side I2C buffer is disabled (Hi-Z)

I2CEN

Sink side I2C buffer is enabled

Sink side TMDS on

Sink side TMDS off (Hi-Z)

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