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MAX8745 Datasheet(PDF) 13 Page - Maxim Integrated Products

Part # MAX8745
Description  High-Efficiency, Quad Output, Main Power-Supply Controllers for Notebook Computers
PDF  36 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX8745 Datasheet(HTML) 13 Page - Maxim Integrated Products

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High-Efficiency, Quad Output, Main Power-
Supply Controllers for Notebook Computers
______________________________________________________________________________________
13
PIN
NAME
FUNCTION
1
ONA
Auxiliary LDO Enable Input. When ONA is pulled low, OUTA is high impedance and the secondary
feedback control is disabled. When ONA is driven high, the controller enables the auxiliary LDO.
2
DRVA
Auxiliary LDO Transistor Base Driver. Connect DRVA to the base of a pnp power transistor. Add a
680
Ω pullup resistor between the base and emitter.
3
ILIM
Peak Current-Limit Threshold Adjustment. The current-limit threshold defaults to 50mV if ILIM is pulled
up to LDO5. In adjustable mode, the current-limit threshold across CSH_ and CSL_ is precisely 1/10
the voltage seen at ILIM over a 0.5V to 2.0V range. The logic threshold for switchover to the 50mV
default value is approximately VLDO5 - 1V.
4
SHDN
Shutdown Control Input. The device enters its 8µA supply-current shutdown mode if V SHDN is less
than the SHDN input falling edge trip level and does not restart until V SHDN is greater than the SHDN
input rising-edge trip level. Connect SHDN to VIN for automatic startup. SHDN can be connected to
VIN through a resistive voltage-divider to implement a programmable undervoltage lockout.
5
ON3
3.3V SMPS Enable Input. Driving ON3 high enables the 3.3V SMPS, while pulling ON3 low disables
the 3.3V SMPS. If ON3 is connected to REF, the 3.3V SMPS starts after the 5V SMPS reaches
regulation (delayed start). Drive ON3 below the clear fault level to reset the fault latch.
6
ON5
5V SMPS Enable Input. Driving ON5 high enables the 5V SMPS, while pulling ON5 low disables the
5V SMPS. If ON5 is connected to REF, the 5V SMPS starts after the 3.3V SMPS reaches regulation
(delayed start). Drive ON5 below the clear fault level to reset the fault latch.
7
REF
2.0V Reference Voltage Output. Bypass REF to analog ground with a 0.1µF or greater ceramic
capacitor. The reference sources up to 50µA for external loads. Loading REF degrades output-
voltage accuracy according to the REF load-regulation error. The reference shuts down when the
system pulls SHDN low.
8
GND
Analog Ground. Connect the exposed backside pad to GND.
9
FSEL
Frequency Select Input. This three-level logic input sets the controllers’ switching frequency. Connect
to LDO5, REF, or GND to select the following typical switching frequencies:
LDO5 = 500kHz, REF = 300kHz, GND = 200kHz.
10
SKIP
Pulse-Skipping Control Input. Connect to LDO5 for low-noise, forced-PWM operation. Connect to REF
for automatic, low-noise, pulse-skipping operation at light loads. Connect to GND for automatic, high-
efficiency, pulse-skipping operation at light loads.
11
FB5
Feedback Input for the 5V SMPS. Connect to LDO5 for the preset 5V output. In adjustable mode, FB5
regulates to 2V.
12
CSH5
Positive Current-Sense Input for the 5V SMPS. Connect to the positive terminal of the current-sense
element. Figure 7 describes two different current-sensing options—using accurate sense resistors or
lossless inductor DCR sensing.
13
CSL5
Output-Sense and Negative Current-Sense Input for the 5V SMPS. When using the internal preset 5V
feedback-divider (FB5 = LDO5), the controller uses CSL5 to sense the output voltage. Connect to the
negative terminal of the current-sense element. CSL5 also serves as the bootstrap input for LDO5.
14
PGOOD5
Open-Drain, Power-Good Output for the 5V SMPS. PGOOD5 is pulled low if CSL5 drops more than
10% (typ) below the normal regulation point. PGOOD5 is held low during soft-start and shutdown.
PGOOD5 becomes high impedance when CSL5 is in regulation.
Pin Description



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