MAX8745 datasheet(23/36 Pages) MAXIM

23 / 36 page

High-Efficiency, Quad Output, Main Power-

Supply Controllers for Notebook Computers

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5V output (CSL5) through an internal switch only when

CSL5 is above the LDO5 bootstrap threshold (4.5V)

and the soft-start sequence for the CSL5 side has com-

pleted. Bootstrapping works most effectively when the

fixed output voltages are used. Once LDO5 is boot-

strapped from CSL5, the internal 5V linear regulator

turns off. This reduces the internal power dissipation

and improves efficiency at higher input voltages.

Current-Limit Protection (ILIM)

The current-limit circuit uses differential current-sense

inputs (CSH_ and CSL_) to limit the peak inductor cur-

rent. If the magnitude of the current-sense signal

exceeds the current-limit threshold, the PWM controller

turns off the high-side MOSFET (Figure 3). The actual

maximum load current is less than the peak current-

limit threshold by an amount equal to half of the induc-

tor ripple current. Therefore, the maximum load

capability is a function of the current-sense resistance,

inductor value, switching frequency, and duty cycle

(VOUT/VIN).

In forced-PWM mode, the MAX8744/MAX8745 also

implement a negative current limit to prevent excessive

reverse inductor currents when VOUT is sinking current.

The negative current-limit threshold is set to approxi-

mately 120% of the positive current limit and tracks the

positive current limit when ILIM is adjusted.

Connect ILIM to LDO5 for the 50mV default threshold,

or adjust the current-limit threshold with an external

resistor-divider at ILIM. Use a 2µA to 20µA divider cur-

rent for accuracy and noise immunity. The current-limit

threshold adjustment range is from 50mV to 200mV. In

the adjustable mode, the current-limit threshold voltage

equals precisely 1/10 the voltage seen at ILIM. The

logic threshold for switchover to the default value is

approximately VLDO5 - 1V.

Carefully observe the PC board layout guidelines to

ensure that noise and DC errors do not corrupt the dif-

ferential current-sense signals seen by CSH_ and

CSL_. Place the IC close to the sense resistor with

short, direct traces, making a Kelvin-sense connection

to the current-sense resistor.

MOSFET Gate Drivers (DH_, DL_)

The DH_ and DL_ drivers are optimized for driving

moderate-sized high-side and larger low-side power

MOSFETs. This is consistent with the low duty factor

seen in notebook applications, where a large VIN -

VOUT differential exists. The high-side gate drivers

(DH_) source and sink 2A, and the low-side gate dri-

vers (DL_) source 1.7A and sink 3.3A. This ensures

robust gate drive for high-current applications. The

DH_ floating high-side MOSFET drivers are powered by

charge pumps at BST_ while the DL_ synchronous-rec-

tifier drivers are powered directly by the fixed 5V linear

regulator (LDO5).

Adaptive dead-time circuits monitor the DL_ and DH_

drivers and prevent either FET from turning on until the

other is fully off. The adaptive driver dead-time allows

operation without shoot-through with a wide range of

MOSFETs, minimizing delays and maintaining efficiency.

There must be a low-resistance, low-inductance path

from the DL_ and DH_ drivers to the MOSFET gates for

the adaptive dead-time circuits to work properly; other-

wise, the sense circuitry in the MAX8744/ MAX8745 inter-

prets the MOSFET gates as “off” while charge actually

remains. Use very short, wide traces (50 mils to 100 mils

wide if the MOSFET is in from the driver).

The internal pulldown transistor that drives DL_ low is

robust, with a 0.6

Ω (typ) on-resistance. This helps prevent

DL_ from being pulled up due to capacitive coupling from

the drain to the gate of the low-side MOSFETs when the

inductor node (LX_) quickly switches from ground to VIN.

POR

ENABLE OVP

ENABLE UVP

POWER-GOOD

FAULT

0.9 x INT REF_

FAULT

LATCH

0.7 x INT REF_

1.11 x INT REF_

6144

CLK

POWER GOOD

FAULT

PROTECTION

INTERNAL FB

Figure 6. Power-Good and Fault Protection

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