MAX8745 datasheet(14/36 Pages) MAXIM

14 / 36 page

High-Efficiency, Quad Output, Main Power-

Supply Controllers for Notebook Computers

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NAME

FUNCTION

BST5

Boost Flying Capacitor Connection for the 5V SMPS. The MAX8744/MAX8745 include an internal

boost switch connected between LDO5 and BST5. Connect to an external capacitor as shown in

Figure 1.

DH5

High-Side Gate-Driver Output for the 5V SMPS. DH5 swings from LX5 to BST5.

LX5

Inductor Connection for the 5V SMPS. Connect LX5 to the switched side of the inductor. LX5 serves

as the lower supply rail for the DH5 high-side gate driver.

DL5

Low-Side Gate-Driver Output for the 5V SMPS. DL5 swings from PGND to LDO5.

PGND

Power Ground

LDO5

5V Internal Linear-Regulator Output. Bypass with 4.7µF minimum (1µF/25mA). Provides at least

100mA for the DL_ low-side gate drivers, the DH_ high-side drivers through the BST switches, the

PWM controller, logic, reference, and external loads. If CSL5 is greater than 4.5V and soft-start is

complete, the linear regulator shuts down, and LDO5 connects to CSL5 through a 1

Ω switch rated for

loads up to 200mA.

Input of the Startup Circuitry and the LDO5 Internal 5V Linear Regulator. Bypass to PGND with a

0.22µF or greater ceramic capacitor close to the IC.

PGOODA

Open-Drain, Power-Good Output for the Auxiliary LDO. PGOODA is pulled low if FBA drops more

than 10% (typ) below the normal regulation point, and when the auxiliary LDO is shut down. PGOODA

becomes high impedance when FBA is in regulation.

DL3

Low-Side Gate-Driver Output for the 3.3V SMPS. DL3 swings from PGND to LDO5.

LX3

Inductor Connection for the 3.3V SMPS. Connect LX3 to the switched side of the inductor. LX3 serves

as the lower supply rail for the DH3 high-side gate driver.

DH3

High-Side Gate-Driver Output for the 3.3V SMPS. DH3 swings from LX3 to BST3.

BST3

Boost Flying Capacitor Connection for the 3.3V SMPS. The MAX8744/MAX8745 include an internal

boost switch connected between LDO5 and BST3. Connect to an external capacitor as shown in

Figure 1.

PGOOD3

Open-Drain, Power-Good Output for the 3.3V SMPS. PGOOD3 is pulled low if CSL3 drops more than

10% (typ) below the normal regulation point. PGOOD3 is held low during soft-start and shutdown.

PGOOD3 becomes high impedance when CSL3 is in regulation.

CSL3

Output Sense and Negative Current Sense for the 3.3V SMPS. When using the internal preset 3.3V

feedback divider (FB3 = LDO5), the controller uses CSL3 to sense the output voltage. Connect to the

negative terminal of the current-sense element.

CSH3

Positive Current-Sense Input for the 3.3V SMPS. Connect to the positive terminal of the current-sense

element. Figure 7 describes two different current-sensing options—using accurate sense resistors or

lossless inductor DCR sensing.

FB3

Feedback Input for the 3.3V SMPS. Connect to LDO5 for fixed 3.3V output. In adjustable mode, FB3

regulates to 2V.

Pin Description (continued)

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