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M68HC08 Datasheet(PDF) 148 Page - Freescale Semiconductor, Inc |
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M68HC08 Datasheet(HTML) 148 Page - Freescale Semiconductor, Inc |
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148 / 288 page  Pulse Width Modulator (PWM) Data Sheet MC68HC908BD48 — Rev. 2.1 148 Pulse Width Modulator (PWM) Freescale Semiconductor Combining the 5-bit PWM together with the 3-bit BRM, the average duty cycle at the output will be (M+N/8)/32, where M is the content of the 5-bit PWM portion, and N is the content of the 3-bit BRM portion. Using this mechanism, a true 8-bit resolution PWM type DAC with reasonably high repetition rate can be obtained. The value of each PWM Data Register is continuously compared with the content of an internal counter to determine the state of each PWM channel output pin. Double buffering is not used in this PWM design. Table 11-1. PWM I/O Register Summary Addr. Register Name Bit 7 654321 Bit 0 $0020 PWM0 Data Register (0PWM) Read: 0PWM4 0PWM3 0PWM2 0PWM1 0PWM0 0BRM2 0BRM1 0BRM0 Write: $0021 PWM1 Data Register (1PWM) Read: 1PWM4 1PWM3 1PWM2 1PWM1 1PWM0 1BRM2 1BRM1 1BRM0 Write: $0022 PWM2 Data Register (2PWM) Read: 2PWM4 2PWM3 2PWM2 2PWM1 2PWM0 2BRM2 2BRM1 2BRM0 Write: $0023 PWM3 Data Register (3PWM) Read: 3PWM4 3PWM3 3PWM2 3PWM1 3PWM0 3BRM2 3BRM1 3BRM0 Write: $0024 PWM4 Data Register (4PWM) Read: 4PWM4 4PWM3 4PWM2 4PWM1 4PWM0 4BRM2 4BRM1 4BRM0 Write: $0025 PWM5 Data Register (5PWM) Read: 5PWM4 5PWM3 5PWM2 5PWM1 5PWM0 5BRM2 5BRM1 5BRM0 Write: $0026 PWM6 Data Register (6PWM) Read: 6PWM4 6PWM3 6PWM2 6PWM1 6PWM0 6BRM2 6BRM1 6BRM0 Write: $0027 PWM7 Data Register (7PWM) Read: 7PWM4 7PWM3 7PWM2 7PWM1 7PWM0 7BRM2 7BRM1 7BRM0 Write: $0028 PWM Control Register 1 (PWMCR1) Read: PWM7E PWM6E PWM5E PWM4E PWM3E PWM2E PWM1E PWM0E Write: Reset: 00000000 |
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