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M68HC08 Datasheet(PDF) 150 Page - Freescale Semiconductor, Inc |
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M68HC08 Datasheet(HTML) 150 Page - Freescale Semiconductor, Inc |
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150 / 288 page ![]() Pulse Width Modulator (PWM) Data Sheet MC68HC908BD48 — Rev. 2.1 150 Pulse Width Modulator (PWM) Freescale Semiconductor 11.4.1 PWM Data Registers 0 to 15 (0PWM–15PWM) The output waveform of the 16 PWM channels are each configured by an 8-bit register, which contains a 5-bit PWM in MSB portion and a 3-bit binary rate multiplier (BRM) in LSB portion xPWM4–xPWM0 — PWM Bits The value programmed in the 5-bit PWM portion will determine the pulse length of the output. The clock to the 5-bit PWM portion is the system clock (CPU clock), the repetition rate of the output is hence fOP ÷ 32. Examples of PWM output waveforms are shown in Figure 11-3. xBRM2–xBRM0 — Binary Rate Multiplier Bits The 3-bit BRM will generate a number of narrow pulses which are equally distributed among an 8-PWM-cycle frame. The number of pulses generated is equal to the number programmed in the 3-bit BRM portion. Examples of PWM output waveforms are shown in Figure 11-3. Address: $0020–$0027 and $0051–$0058 Bit 7 654321 Bit 0 Read: xPWM4 xPWM3 xPWM2 xPWM1 xPWM0 xBRM2 xBRM1 xBRM0 Write: Reset: 00000000 Figure 11-1. PWM Data Registers 0 to 15 (0PWM–15PWM) |
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