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ADT7490 Datasheet(PDF) 33 Page - Analog Devices

Part # ADT7490
Description  dBCool Remote Thermal Monitor and Fan Controller with PECI Interface
PDF  76 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADT7490 Datasheet(HTML) 33 Page - Analog Devices

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ADT7490
Rev. 0 | Page 33 of 76
5V OR 12V
VCC
PULL-UP TYP
<1kΩ OR
TOTEM POLE
TACH
OUTPUT
FAN SPEED
COUNTER
TACH
ADT7490
ZD1
ZENER*
FAN
*CHOOSE ZD1 VOLTAGE APPROXIMATELY 0.8 × VCC
R1
10kΩ
Figure 45. Fan with Strong TACH Pull-Up to >VCC or Totem-Pole Output,
Clamped with Zener Diode and Resistor
Alternatively, a resistive attenuator can be used, as shown
in Figure 46. R1 and R2 should be chosen such that
2 V < VPULL-UP × R2/(RPULL-UP + R1 + R2) < 3.6 V
The fan inputs have an input resistance of nominally 160 kΩ to
ground, which should be taken into account when calculating
resistor values.
With a pull-up voltage of 12 V and pull-up resistor less than
1 kΩ, suitable values for R1 and R2 are 100 kΩ and 40 kΩ,
respectively. This gives a high input voltage of 3.42 V.
12V
VCC
<1kΩ
TACH
OUTPUT
FAN SPEED
COUNTER
TACH
ADT7490
R2
40kΩ
R1
100kΩ
Figure 46. Fan with Strong TACH Pull-Up to >VCC or Totem-Pole Output,
Attenuated with R1/R2
The fan counter does not count the fan TACH output pulses
directly because the fan speed could be less than 1000 RPM,
and it takes several seconds to accumulate a reasonably large
and accurate count. Instead, the period of the fan revolution is
measured by gating an on-chip 90 kHz oscillator into the input
of a 16-bit counter for N periods of the fan TACH output (see
Figure 47), so the accumulated count is actually proportional
to the fan tachometer period and inversely proportional to the
fan speed.
N, the number of pulses counted, is determined by the settings
of the TACH pulses per revolution register (0x7B). This register
contains two bits for each fan, allowing one, two (default), three,
or four TACH pulses to be counted.
1
2
3
4
CLOCK
PWM
TACH
Figure 47. Fan Speed Measurement
Fan Speed Measurement Registers
The fan tachometer registers are 16-bit values consisting of
a 2-byte read from the ADT7490.
Register 0x28, TACH1 Low Byte = 0x00 default
Register 0x29, TACH1 High Byte = 0x00 default
Register 0x2A, TACH2 Low Byte = 0x00 default
Register 0x2B, TACH2 High Byte = 0x00 default
Register 0x2C, TACH3 Low Byte = 0x00 default
Register 0x2D, TACH3 High Byte = 0x00 default
Register 0x2E, TACH4 Low Byte = 0x00 default
Register 0x2F, TACH4 High Byte = 0x00 default
Reading Fan Speed from the ADT7490
The measurement of fan speeds involves a 2-register read
for each measurement. The low byte should be read first.
This causes the high byte to be frozen until both high and
low byte registers have been read, preventing erroneous
TACH readings. The fan tachometer reading registers report
back the number of 11.11 μs period clocks (90 kHz oscillator)
gated to the fan speed counter, from the rising edge of the first
fan TACH pulse to the rising edge of the third fan TACH pulse
(assuming two pulses per revolution are being counted).
Because the device is essentially measuring the fan TACH
period, the higher the count value, the slower the fan is actu-
ally running. A 16-bit fan tachometer reading of 0xFFFF
indicates that either the fan has stalled or is running very
slowly (<100 RPM).
High Limit > Comparison Performed
Because the actual fan TACH period is being measured, falling
below a fan TACH limit by 1 sets the appropriate status bit and
can be used to generate an SMBALERT.
Fan TACH Limit Registers
The fan TACH limit registers are 16-bit values consisting of
two bytes.
Register 0x54, TACH1 Minimum Low Byte = 0xFF default
Register 0x55, TACH1 Minimum High Byte = 0xFF default
Register 0x56, TACH2 Minimum Low Byte = 0xFF default
Register 0x57, TACH2 Minimum High Byte = 0xFF default
Register 0x58, TACH3 Minimum Low Byte = 0xFF default
Register 0x59, TACH3 Minimum High Byte = 0xFF default
Register 0x5A, TACH4 Minimum Low Byte = 0xFF default
Register 0x5B, TACH4 Minimum High Byte = 0xFF default



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