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H838024R Datasheet(PDF) 127 Page - Renesas Technology Corp |
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H838024R Datasheet(HTML) 127 Page - Renesas Technology Corp |
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127 / 697 page ![]() Section 3 Exception Handling Rev. 7.00 Mar 10, 2005 page 85 of 652 REJ09B0042-0700 Bit 7—Timer A Interrupt Request Flag (IRRTA) Bit 7 IRRTA Description 0 Clearing conditions: (initial value) When IRRTA = 1, it is cleared by writing 0 1 Setting conditions: When the timer A counter value overflows Bit 6—Reserved Bit 6 is reserved; it can only be written with 0. Bit 5—Reserved Bit 5 is reserved; it is always read as 1 and cannot be modified. Bits 4 and 3—IRQ4 and IRQ3 Interrupt Request Flags (IRRI4 and IRRI3) Bit n IRRIn Description 0 Clearing conditions: (initial value) When IRRIn = 1, it is cleared by writing 0 1 Setting conditions: When pin IRQn is designated for interrupt input and the designated signal edge is input (n = 4 or 3) Bit 2—IRQAEC Interrupt Request Flag (IRREC2) Bit 2 IRREC2 Description 0 Clearing conditions: (initial value) When IRREC2 = 1, it is cleared by writing 0 1 Setting conditions: When pin IRQAEC is designated for interrupt input and the designated signal edge is input |
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