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MP2667GG Datasheet(PDF) 4 Page - Monolithic Power Systems |
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MP2667GG Datasheet(HTML) 4 Page - Monolithic Power Systems |
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4 / 35 page ![]() MP2667 – 1A, SINGLE-CELL CHARGER W/ I2C CONTROL, POWER PATH MP2667 Rev. 1.0 www.MonolithicPower.com 4 5/8/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. PACKAGE REFERENCE TOP VIEW INT 3 GND 4 SCL 5 SDA 6 9 10 BATT 8 7 NTC IN 2 1 SYS VDD BATT QFN-10 (2mmx2mm) PIN FUNCTIONS Pin # Name I/O Description 1 IN Power Input power pin. Place a ≥1μF ceramic capacitor from IN to GND, as close to the IC as possible. 2 NTC I Temperature sense input. Connect a negative temperature coefficient thermistor to NTC. Program the hot and cold temperature window with a resistor divider from IN to NTC to GND. The charge is suspended when NTC is out of range. 3 INT O Interrupt output. INT can send the charging status and fault interrupt signal to the host. INT is also used to disconnect the system from the battery. Pull INT from high to low for >8s to disconnect the battery from the system. The external pull-up resistor at INT must be greater than 1 00kΩ. 4 VDD I Internal control power supply. Connect a ceramic capacitor ( 0.1μF) from VDD to GND. No external load is allowed. 5 GND Power Ground. 6 SCL I/O I2C interface clock. Connect SCL to the logic rail through a 10k Ω resistor. 7 SDA I/O I2C interface data. Connect SDA to the logic rail through a 10k Ω resistor. 8, 9 BATT Power Battery pin. Place a ceramic capacitor from BATT to GND, as close to the IC as possible. 10 SYS Power System power supply. Place a ceramic capacitor from SYS to GND, as close to the IC as possible. |
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