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PM5366-PI Datasheet(PDF) 213 Page - PMC-Sierra, Inc |
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PM5366-PI Datasheet(HTML) 213 Page - PMC-Sierra, Inc |
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213 / 267 page ![]() PRELIMINARY PM5366 TEMAP-84 DATASHEET PMC-2010672 ISSUE 1 HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER PROPRIETARY AND CONFIDENTIAL 201 STCTEST The single transport chain instruction is used to test out the TAP controller and the boundary scan register during production test. When this instruction is the current instruction, the boundary scan register is connected between TDI and TDO. During the Capture-DR state, the device identification code is loaded into the boundary scan register. The code can then be shifted out of the output, TDO, using the Shift-DR state. Boundary Scan Cells In the following diagrams, CLOCK-DR is equal to TCK when the current controller state is SHIFT-DR or CAPTURE-DR, and unchanging otherwise. The multiplexer in the center of the diagram selects one of four inputs, depending on the status of select lines G1 and G2. The ID Code bit is as listed in the Boundary Scan Register table in the JTAG Test Port section 11.2. Figure 29 - Input Observation Cell (IN_CELL) Input Pad D C CLOCK-DR Scan Chain Out INPUT to internal logic SHIFT-DR Scan Chain In 1 2 MUX 1 2 1 2 1 2 I.D. Code bit IDCODE G1 G2 |
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