PM7344 datasheet(225/293 Pages) PMC

225 / 293 page

PM7344 S/UNI-MPH

DATA SHEET

PMC-950449

ISSUE 6

MULTI-PHY USER NETWORK INTERFACE

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

209

TFULL4:

The TFULL4 bit selects the amount of advance indication given on the

transmit cell available (TCA[x]) signal. When TFULL4 is logic 1, TCA[x] is

removed when the transmit FIFO is almost full and can accept no more than

four bytes before reaching the depth specified by the FIFODP[1:0] register

bits. When TFULL4 is logic 0, TCA[x] is removed when the current FIFO

access writes the last octet of a cell which fills the FIFO to the specified depth

FIFOE:

The FIFOE bit enables the generation of an interrupt when a transmit FIFO

overrun, or a change of cell alignment (COCA) is detected. When a logic 1 is

written to FIFOE, the interrupt generation is enabled.

HCKE:

The HCKE bit enables the generation of an interrupt when a FIFO datapath

integrity error is detected. When a logic 1 is written to HCKE, the interrupt

generation is enabled.

FIXPAT:

The FIXPAT bit selects the pattern used when FIFO data path integrity

checking is enabled. When FIXPAT is logic 1, the HCS octet placeholder

location is checked for the fixed 55H pattern. When FIXPAT is logic 0, the

HCS octet placeholder location is checked for an alternating AAH/55H pattern

which alternates with each cell written to the transmit FIFO.

PM7344 Datasheet(PDF) 225 Page - PMC-Sierra, Inc