PM7344 datasheet(137/293 Pages) PMC

137 / 293 page

PM7344 S/UNI-MPH

DATA SHEET

PMC-950449

ISSUE 6

MULTI-PHY USER NETWORK INTERFACE

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

121

Registers 023H, 123H, 223H and 323H: E1-FRMR Maintenance/Alarm Status

Interrupt Enable

Bit

Type

Function

Default

Bit 7

R/W

RRAE

Bit 6

R/W

Reserved

Bit 5

R/W

AISDE

Bit 4

R/W

Reserved

Bit 3

R/W

REDE

Bit 2

R/W

AISE

Bit 1

R/W

FEBEE

Bit 0

R/W

CRCEE

Reserved:

The reserved bits must be programmed to logic 0 for correct operation.

RRAE , AISDE, REDE, and AISE:

A logic one in bits RRAE, AISDE, REDE, or AISE enables the generation of

an interrupt on a change of state of the RRA, AISD, RED, and AIS bits,

respectively, of the E1-FRMR Maintenance/Alarm Status register.

FEBEE:

When the FEBEE bit is a logic one, an interrupt is generated when a logic

zero is received in the Si bits of frames 13 or 15.

CRCEE:

When the CRCEE bit is a logic one, an interrupt is generated when

calculated CRC differs from the received CRC remainder.

PM7344 Datasheet(PDF) 137 Page - PMC-Sierra, Inc

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