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PM7344 Datasheet(PDF) 182 Page - PMC-Sierra, Inc |
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PM7344 Datasheet(HTML) 182 Page - PMC-Sierra, Inc |
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182 / 293 page  PM7344 S/UNI-MPH DATA SHEET PMC-950449 ISSUE 6 MULTI-PHY USER NETWORK INTERFACE PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 166 Registers 04FH, 14FH, 24FH and 34FH: PMON Line Code Violation Count MSB Bit Type Function Default Bit 7 Unused X Bit 6 Unused X Bit 5 Unused X Bit 4 R LCV[12] X Bit 3 R LCV[11] X Bit 2 R LCV[10] X Bit 1 R LCV[9] X Bit 0 R LCV[8] X These registers indicate the number of LCV error events that occurred during the previous accumulation interval. An LCV event is defined as the occurrence of a Bipolar Violation or Excessive Zeros (>7 consecutives zeros for T1 B8ZS, >15 consecutive zeros for T1 AMI, or >3 consecutive zeros for E1 AMI or E1 HDB3). The counting of Excessive Zeros can be disabled by the BPV bit of the Receive Interface Configuration register. |
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