PM7367 datasheet(50/323 Pages) PMC

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PM7367 FREEDM-32P32

DATA SHEET

PMC-1991499

ISSUE 2

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE

is detected. The reader then informs the roamer that a transaction is consumed.

The roamer updates its transaction count and clears the non-zero transaction

count flag if required. The roamer then services the next channel with its

transaction flag set high.

The writer and reader determine empty and full FIFO conditions using flags.

Each block in the partial packet buffer has an associated flag. The writer sets

the flag after the block is written and the reader clears the flag after the block is

read. The flags are initialized (cleared) when the block pointers are written using

indirect block writes. The writer declares a channel FIFO overrun whenever the

writer tries to store data to a block with a set flag. In order to support optional

removal of the FCS from the packet data, the writer does not declare a block as

filled (set the block flag nor increment the transaction count) until the first double

word of the next block in channel FIFO is filled. If the end of a packet resides in

the first double word, the writer declares both blocks as full at the same time.

When the reader finishes processing a transaction, it examines the first double

word of the next block for the end-of-packet flag. If the first double word of the

next block contains only FCS bytes, the reader would, optionally, process next

transaction (end-of-packet) and consume the block, as it contains information not

transferred to the RMAC block.

8.4 Receive DMA Controller

The Receive DMA Controller block (RMAC) is a DMA controller which stores

received packet data in host computer memory. The RMAC is not directly

connected to the host memory PCI bus. Memory accesses are serviced by a

downstream PCI controller block (GPIC). The RMAC and the host exchange

information using receive packet descriptors (RPDs). The descriptor contains

the size and location of buffers in host memory and the packet status information

associated with the data in each buffer. RPDs are transferred from the RMAC to

the host and vice versa using descriptor reference queues. The RMAC

maintains all the pointers for the operation of the queues. The RMAC provides

two receive packet descriptor reference (RPDR) free queues to support small

and large buffers. The RMAC acquires free buffers by reading RPDRs from the

free queues. After a packet is received, the RMAC places the associated RPDR

onto a RPDR ready queue. To minimise host bus accesses, the RMAC

maintains a descriptor reference table to store current DMA information. This

table contains separate DMA information entries for up to 32 receive channels.

8.4.1 Data Structures

For packet data, the RMAC communicates with the host using Receive Packet

Descriptors (RPD), Receive Packet Descriptor References (RPDR), the Receive

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