PM7367 datasheet(95/323 Pages) PMC

95 / 323 page

PM7367 FREEDM-32P32

DATA SHEET

PMC-1991499

ISSUE 2

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE

Bit

Type

Function

Default

Bit 31

Bit 16

Unused

XXXXH

Bit 15

R/W

TFUDRE

Bit 14

R/W

IOCE

Bit 13

R/W

TDFQEE

Bit 12

R/W

TDQRDYE

Bit 11

R/W

TDQFE

Bit 10

R/W

RPDRQEE

Bit 9

R/W

RPDFQEE

Bit 8

R/W

RPQRDYE

Bit 7

R/W

RPQLFE

Bit 6

R/W

RPQSFE

Bit 5

R/W

RFOVRE

Bit 4

R/W

RPFEE

Bit 3

R/W

RABRTE

Bit 2

R/W

RFCSEE

Bit 1

R/W

PERRE

Bit 0

R/W

SERRE

This register provides interrupt enables for various events detected or initiated by

the FREEDM.

Note

This register is not byte addressable. Writing to this register modifies all the bits

in the register. Byte selection using byte enable signals (CBEB[3:0]) are not

implemented. However, when all four byte enables are negated, no access is

made to this register.

PM7367 Datasheet(PDF) 95 Page - PMC-Sierra, Inc

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