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PM7367 Datasheet(PDF) 58 Page - PMC-Sierra, Inc |
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PM7367 Datasheet(HTML) 58 Page - PMC-Sierra, Inc |
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58 / 323 page  PM7367 FREEDM-32P32 DATA SHEET PMC-1991499 ISSUE 2 FRAME ENGINE AND DATA LINK MANAGER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE 44 Although a STATUS+RPDR only totals to 16 bits, each queue entry is a dword, i.e. 32 bits. When the RMAC block writes a STATUS+RPDR to the ready queue, it sets the third byte to 0 and the fourth (most significant) byte is unmodified. Figure 7 – RPDRR Queue Operation Rx Packet Descriptor Reference Ready Queue Bit 0 Bit 31 STATUS + RPDR RPDRRQ_START_ADDR RPDRRQ_END_ADDR RPDRRQ_READ_ADDR RPDRRQ_WRITE_ADDR STATUS + RPDR STATUS + RPDR RPD - 16 bytes RPD - 16 bytes RPD - 16 bytes RPD - 16 bytes RPD - 16 bytes buffer -packet M buffer -packet N buffer -start of packet O buffer -middle of packet O buffer -end of packet O Receive Channel Descriptor Reference Table On a per-channel basis, the RMAC caches information such as the current DMA information in a Receive Channel Descriptor Reference (RCDR) Table. The RMAC can process 32 channels and stores three dwords of information per channel. This information is cached internally in order to decrease the number of host bus accesses required to process each data packet. The structure of the RCDR table is shown in Figure 8. |
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