PM7367 datasheet(143/323 Pages) PMC

143 / 323 page

PM7367 FREEDM-32P32

DATA SHEET

PMC-1991499

ISSUE 2

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE

129

CRC[1:0]:

The CRC algorithm bits (CRC[1:0]) configures the HDLC processor to

perform CRC verification on the incoming data stream. The value of

CRC[1:0] to be written to the channel provision RAM, in an indirect channel

write operation, must be set up in this register before triggering the write.

CRC[1:0] is ignored when DELIN is low. CRC[1:0] reflects the value written

until the completion of a subsequent indirect channel read operation.

Table 16 – CRC[1:0] Settings

CRC[1]

CRC[0]

Operation

No Verification

CRC-CCITT

CRC-32

Reserved

PROV:

The indirect provision enable bit (PROV) reports the channel provision enable

flag read from the channel provision RAM after an indirect channel read

operation has completed. The provision enable flag to be written to the

channel provision RAM, in an indirect write operation, must be set up in this

processor will process data on the channel specified by CHAN[4:0]. When

PROV is set low, the HDLC processor will ignore data on the channel

specified by CHAN[4:0]. PROV reflects the value written until the completion

of a subsequent indirect channel read operation.

PM7367 Datasheet(PDF) 143 Page - PMC-Sierra, Inc