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PM7367 Datasheet(PDF) 198 Page - PMC-Sierra, Inc

Part # PM7367
Description  FRAME ENGINE AND DATA LINK MANAGER
PDF  323 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7367 Datasheet(HTML) 198 Page - PMC-Sierra, Inc

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PM7367 FREEDM-32P32
DATA SHEET
PMC-1991499
ISSUE 2
FRAME ENGINE AND DATA LINK MANAGER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE
184
Register 0x310 : TMAC Queue Base LSW
Bit
Type
Function
Default
Bit 31
to
Bit 16
Unused
XXXXH
Bit 15
R/W
TQB[15]
0
Bit 14
R/W
TQB[14]
0
Bit 13
R/W
TQB[13]
0
Bit 12
R/W
TQB[12]
0
Bit 11
R/W
TQB[11]
0
Bit 10
R/W
TQB[10]
0
Bit 9
R/W
TQB[9]
0
Bit 8
R/W
TQB[8]
0
Bit 7
R/W
TQB[7]
0
Bit 6
R/W
TQB[6]
0
Bit 5
R/W
TQB[5]
0
Bit 4
R/W
TQB[4]
0
Bit 3
R/W
TQB[3]
0
Bit 2
R/W
TQB[2]
0
Bit 1
R/W
TQB[1]
0
Bit 0
R/W
TQB[0]
0
This register provides the less significant word of the Transmit Queue Base
address. The contents of this register is held in a holding register until a write
access to the companion TMAC Transmit Queue Base MSW register.
Note
This register is not byte addressable. Writing to this register modifies all the bits
in the register. Byte selection using byte enable signals (CBEB[3:0]) are not
implemented. However, when all four byte enables are negated, no access is
made to this register.



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