PM7382-PI datasheet(97/330 Pages) PMC

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PM7382 FREEDM-32P256

DATA SHEET

PMC-2010333

ISSUE 3

FRAME ENGINE AND DATA LINK MANAGER 32P256

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

PCI Offset

0x480 - 0x4FC

TCAS Link #0 through #31 Configuration

0x500

PMON Status

0x504

PMON Receive FIFO Overflow Count

0x508

PMON Transmit FIFO Underflow Count

0x50C

PMON Configurable Count #1

0x510

PMON Configurable Count #2

0x514 - 0x51C

PMON Reserved

0x520 - 0x7FC

Reserved

The following PCI configuration registers are implemented by the PCI Interface.

These registers can only be accessed when the PCI Interface is a target and a

configuration cycle is in progress as indicated using the IDSEL input.

Table 13 – PCI Configuration Register Memory Map

PCI Offset

0x00

Vendor Identification/Device Identification

0x04

Command/Status

0x08

Revision Identifier/Class Code

0x0C

Cache Line Size/Latency Timer/Header Type/BIST

0x10

CBI Memory Base Address Register

0x14 - 0x24

Unused Base Address Register

0x28 - 0x38

Reserved

0x3C

Interrupt Line/Interrupt Pin/MIN_GNT/MAX_LAT

PM7382-PI Datasheet(PDF) 97 Page - PMC-Sierra, Inc

PM7382-PI Datasheet(HTML) 97 Page - PMC-Sierra, Inc

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