MB95F104AJS datasheet(56/72 Pages) FUJITSU

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MB95100AM Series

(8) I2C Timing

(Vcc

= 5.0 V ± 10%, AVss = Vss = 0.0 V, TA = − 40 °C to + 85 °C)

*1 : R, C : Pull-up resistor and load capacitor of the SCL and SDA lines.

*2 : The maximum tHD;DAT have only to be met if the device dose not stretch the “L” width (tLOW) of the SCL signal.

*3 : A Fast-mode I2C-bus device can be used in a Standard-mode I2C-bus system, but the requirement

tSU;DAT

≥ 250 ns must then be met.

Parameter

Symbol

name

Conditions

Value

Unit

Standard-

mode

Fast-mode

Min

Max

Min

Max

SCL clock frequency

fSCL

SCL0

= 1.7 kΩ,

= 50 pF*1

100

400

kHz

(Repeat) Start condition hold time

SDA

↓ → SCL ↓

tHD;STA

SCL0

SDA0

4.0

⎯

0.6

⎯µs

SCL clock “L” width

tLOW

SCL0

4.7

⎯

1.3

⎯µs

SCL clock “H” width

tHIGH

SCL0

4.0

⎯

0.6

⎯µs

(Repeat) Start condition setup time

SCL

↑ → SDA ↓

tSU;STA

SCL0

SDA0

4.7

⎯

0.6

⎯µs

Data hold time SCL

↓ → SDA ↓ ↑

tHD;DAT

SCL0

SDA0

03.45*2

00.9*3

µs

Data setup time SDA

↓ ↑ → SCL ↑

tSU;DAT

SCL0

SDA0

0.25

⎯

0.1

⎯µs

Stop condition setup time SCL

↑ →

SDA

↑

tSU;STO

SCL0

SDA0

⎯

0.6

⎯µs

Bus free time between stop

condition and start condition

tBUF

SCL0

SDA0

4.7

⎯

1.3

⎯µs

SDA0

SCL0

tWAKEUP

tHD;STA

tSU;DAT

tHD;STA

tSU;STA

tLOW

tHD;DAT

tHIGH

tSU;STO

tBUF

MB95F104AJS Datasheet(PDF) 56 Page - fujitsu semiconductor

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