| Electronic Components Datasheet Search |
|
LP2951 Datasheet(PDF) 5 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
LP2951 Datasheet(HTML) 5 Page - Texas Instruments |
|
5 / 47 page ![]() 5.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VIN Input voltage 2.0 30 V VEN Enable voltage 0 30 VOUT Output voltage 1.2 30 IL Output current 0 100 mA CL Output capacitor(1) 1 2.2 100 µF CL ESR Output capacitor ESR (Legacy chip) 30m 5 Ω Output capacitor ESR (New chip) 0 2 CIN Input capacitor 1 µF CFF Feed-forward capacitor (optional(2), for adjustable device only) 10 pF IFB_DIVIDER Feedback divider current(2) (adjustable device only) 12 µA TJ Junction temperature –40 125 °C (1) Effective output capacitance of 0.5µF minimum required for stability. (2) CFF required for stability if the feedback divider current < 12µA. Feedback divider current = VOUT / (R1 + R2). See the Feed-Forward Capacitor (CFF) section for details. 5.4 Thermal Information THERMAL METRIC(1) (2) Legacy Chip New Chip UNIT D DRG D DRG 8 PINS 8 PINS 8 PINS 8 PINS RθJA Junction-to-ambient thermal resistance 121.6 55.7 123 48.5 °C/W RθJC(top) Junction-to-case (top) thermal resistance 69.8 66.5 67.8 60.4 °C/W RθJB Junction-to-board thermal resistance 61.9 30.2 70.7 22.4 °C/W ΨJT Junction-to-top characterization parameter 22.2 1.1 18.0 1.7 °C/W ΨJB Junction-to-board characterization parameter 69.8 30.4 69.8 22.4 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance n/a 10 n/a 3.3 °C/W (1) The thermal data is based on the JEDEC standard high K profile,JESD 51-7. Two-signal, two-plane, four-layer board with 2-oz. copper. The copper pad is soldered to the thermal land pattern. Also, correct attachment procedure must be incorporated. (2) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note. 5.5 Electrical Characteristics (Both Legacy and New Chip) VIN = VOUT (nominal) + 1V, IL = 100µA, CL = 1µF (for new chip) and CL = 2.2µF (for legacy chip), FEEDBACK tied to VTAP, OUTPUT tied to SENSE, VSHUTDOWN ≤ 0.7V PARAMETER TEST CONDITIONS TJ MIN TYP MAX UNIT 3.3-V VERSION Output voltage IL = 100µA Legacy chip 25°C 3.267 3.3 3.333 V –40°C to 125°C 3.234 3.3 3.366 New chip 25°C 3.2868 3.3 3.3132 –40°C to 125°C 3.2736 3.3 3.3264 5-V VERSION www.ti.com LP2951-Q1 SLVSAW6H – JUNE 2011 – REVISED NOVEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: LP2951-Q1 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |