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YSS950 Datasheet(PDF) 8 Page - YAMAHA CORPORATION |
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YSS950 Datasheet(HTML) 8 Page - YAMAHA CORPORATION |
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8 / 30 page ![]() YSS950 8 Type Pin No. Pin Name I/O Note 1) Function 26 39 55 VDD33 − Digital power supply for pin block (Typ. 3.3 V) 9 24 25 40 41 56 57 VDD12 − Digital power supply for Core block (Typ. 1.2 V) 62 64 PAVDD − Power supply for PLL analog block (Typ. 1.2 V) Insert a 0.1 µF capacitor between the PAVDD and PAVSS pins. 3 PDVDD − Power supply for PLL digital block (Typ. 1.2 V) Insert a 0.1 µF capacitor between the PDVDD and PDVSS pins. 4 16 17 32 33 48 49 61 VSS − Digital ground 1 63 PAVSS − PLL analog ground Insert a 0.1 µF capacitor between the PAVDD and PAVSS pins. Power supply 2 PDVSS − PLL digital ground Insert a 0.1 µF capacitor between the PDVDD and PDVSS pins. Note 1) I/O symbols • I: Input • Is: Schmitt trigger input • I+: Built in pull-up circuit (*) • O: Output • Ot: 3-state output * Built in pull-up circuit cannot be used for Hi-level output of the LSI, because of this ability is only keep Hi-level for input pin when it is open. Note 2) Example of circuit connected to crystal oscillator XI XO 12.288 MHz * The above resistor and capacitor values vary depending on a crystal oscillator. Be sure to meet the specifications for the crystal oscillator to be used. |
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