RTL8305SC
Datasheet
5-port 10/100Mbps Single-Chip Dual MII Switch Controller
62
Track ID: JATR-1076-21 Rev. 1.2
7.1.14. PHY 0 Register 26: Reserved or VLAN ID [F] Membership
7.1.14.1 PHY 0 Register 26: Reserved Register (Page=0)
Table 73. PHY 0 Register 26: Reserved Register
Reg.bit
Name
Mode Description
Default
26.[15:0] Reserved
0x5105
7.1.14.2 PHY 0 Register 26: VLAN ID [F] Membership (Page=1)
Table 74. PHY 0 Register 26: VLAN ID [F] Membership
Reg.bit
Name
Mode Description
Default
26.[15:5] Reserved
1111 1111
111
26.[4:0]
VLAN ID [F]
Membership Bit
[4:0]
RW
This 5-bit field specifies which ports are the members of VLAN
F. If a destination address look up fails, the packet associated
with this VLAN will be broadcast to the ports specified in this
field. Bit 0 stands for port 0, bit 4 stands for port 4.
E.g.:
10001 means port 4 and 0 are the members of VLAN F
10010 means port 4 and 1 are the members of VLAN F
11111 means all 5 ports are the members of VLAN F
1 0001
7.1.15. PHY 0 Register 27: Reserved or VLAN ID [F]
7.1.15.1 PHY 0 Register 27: Reserved Register (Page=0)
Table 75. PHY 0 Register 27: Reserved Register
Reg.bit
Name
Mode Description
Default
27.[15:0] Reserved
0x0000
7.1.15.2 PHY 0 Register 27: VLAN ID [F] (Page=1)
Table 76. PHY 0 Register 27: VLAN ID [F]
Reg.bit
Name
Mode Description
Default
27.[15:12
]
Reserved
1111
27.[11:0] VLAN ID [F]
RW
Defines the IEEE 802.1Q 12-bit VLAN identifier of VLAN F
0000 0000
0101
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